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  • 參數(shù)資料
    型號(hào): MAX147BEAP
    廠商: MAXIM INTEGRATED PRODUCTS INC
    元件分類: ADC
    英文描述: +2.7Low-Power, 8-Channel, Serial 12-Bit ADCs
    中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
    封裝: SSOP-20
    文件頁數(shù): 16/24頁
    文件大?。?/td> 198K
    代理商: MAX147BEAP
    M
    +2.7V, Low-Power, 8-Channel,
    S erial 12-Bit ADCs
    16
    ______________________________________________________________________________________
    Referenc e-Buffer Compensation
    In addition to its shutdown function,
    SHDN
    selects inter-
    nal or external compensation. The compensation
    affects both power-up time and maximum conversion
    speed. The100kHz minimum clock rate is limited by
    droop on the sample-and-hold and is independent of
    the compensation used.
    Float
    SHDN
    to select external compensation. The
    Typical Operating Circuit uses a 4.7μF capacitor at
    VREF. A 4.7μF value ensures reference-buffer stability
    and allows converter operation at the 2MHz full clock
    speed. External compensation increases power-up
    time (see the Choosing Power-Down Mode section and
    Table 4).
    Pull
    SHDN
    high to select internal compensation.
    Internal compensation requires no external capacitor at
    VREF and allows for the shortest power-up times. The
    maximum clock rate is 2MHz in internal clock mode
    and 400kHz in external clock mode.
    Choosing Power-Down Mode
    You can save power by placing the converter in a low-
    current shutdown state between conversions. Select full
    power-down mode or fast power-down mode via bits 1
    and 0 of the DIN control byte with
    SHDN
    high or floating
    (Tables 1 and 5). In both software power-down modes,
    the serial interface remains operational, but the ADC
    does not convert. Pull
    SHDN
    low at any time to shut
    down the converter completely.
    SHDN
    overrides bits 1
    and 0 of the control byte.
    Full power-down mode turns off all chip functions that
    draw quiescent current, reducing supply current to 2μA
    (typ). Fast power-down mode turns off all circuitry
    except the bandgap reference. With fast power-down
    mode, the supply current is 30μA. Power-up time can be
    shortened to 5μs in internal compensation mode.
    Table 4 shows how the choice of reference-buffer com-
    pensation and power-down mode affects both power-up
    delay and maximum sample rate. In external compensa-
    tion mode, power-up time is 20ms with a 4.7μF compen-
    sation capacitor when the capacitor is initially fully
    discharged. From fast power-down, start-up time can be
    eliminated by using low-leakage capacitors that do not
    discharge more than 1/2LSB while shut down. In power-
    down, leakage currents at VREF cause droop on the ref-
    erence bypass capacitor. Figures 12a and 12b show
    the various power-down sequences in both external and
    internal clock modes.
    Software Power-Down
    Software power-down is activated using bits PD1 and PD0
    of the control byte. As shown in Table 5, PD1 and PD0
    also specify the clock mode. When software shutdown is
    asserted, the ADC operates in the last specified clock
    mode until the conversion is complete. Then the ADC
    powers down into a low quiescent-current state. In internal
    clock mode, the interface remains active and conversion
    results may be clocked out after the MAX146/MAX147
    enter a software power-down.
    The first logical 1 on DIN is interpreted as a start bit
    and powers up the MAX146/MAX147. Following
    the start bit, the data input word or control byte also
    determines clock mode and power-down states. For
    example, if the DIN word contains PD1 = 1, then the
    chip remains powered up. If PD0 = PD1 = 0, a
    power-down resumes after one conversion.
    Table 4. Typical Power-Up Delay Times
    133
    2
    Full
    Disabled
    133
    2
    Fast
    Disabled
    133
    See Figure 14c
    Full
    4.7
    External
    Enabled
    133
    See Figure 14c
    Fast
    4.7
    External
    Enabled
    26
    300
    Full
    Internal
    Enabled
    26
    5
    Fast
    Internal
    Enabled
    MAXIMUM
    SAMPLING RATE
    (ksps)
    POWER-UP
    DELAY
    (μs)
    POWER-DOWN
    MODE
    VREF
    CAPACITOR
    (μF)
    REFERENCE-
    BUFFER
    COMPENSATION
    MODE
    REFERENCE
    BUFFER
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    MAX147BEAP+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
    MAX147BEAP+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
    MAX147BEAP-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
    MAX147BEPP 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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