參數(shù)資料
型號(hào)： MAX1464
廠商： Maxim Integrated Products, Inc.
英文描述： Low-Power, Low-Noise Multichannel Sensor Signal Processor
中文描述： 低功耗、低噪聲、多路傳感器信號(hào)處理器
文件頁(yè)數(shù)： 23/47頁(yè)
文件大?。?/td> 527K
代理商： MAX1464
M
Low-Power, Low-Noise Multichannel
Sensor Signal Processor
______________________________________________________________________________________
23
Description:
Perform a 16-bit logical AND operation, bit for bit, on
the contents of the A-register and the contents of the X-
register. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ORX
Op-code:
Operation:
OR Register X with Register A
0011 XXXX
BINARY
3Xh
A-register
←
A-register OR X-register
PC-register
←
PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit logical OR operation, bit for bit, on the
contents of the A-register and the contents of the X-reg-
ister. Store the 16-bit result back into the A-register.
The previous contents of the A-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is not preserved.
No branching occurs.
No other registers are affected.
ADX
Op-code:
Operation:
ADD Register X to Register A
0100 XXXX
BINARY
4Xh
A-register
←
A-register + X-register
PC-register
←
PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit arithmetic addition of the A-register
and the contents of the X-register. Store the low 16 bits
of the result back into the A-register. Any overflow bit
resulting from the addition operation is lost. The previ-
ous contents of the A-register are overwritten and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
STX
Op-code:
Operation:
Store Register X
0101 XXXX
BINARY
5Xh
X-register
←
A-register
PC-register
←
PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
Description:
Perform a 16-bit move operation from the A-register into
the X-register. The A-register contents are unchanged.
The previous contents of the X-register are overwritten
and lost.
Register X can be any of the 16 CPU registers.
PC is incremented once to point to the next instruction
in program memory.
Two’s-complement data format is preserved.
No branching occurs.
No other registers are affected.
SLX
Op-code:
Shift Left Register X
0110 XXXX
BINARY
6Xh
PC-register
←
PC + 1 (point to next instruction)
CPU Cycles required:
1 cycle
14
15
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
BIT:
14
15
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BIT:
14
15
13
12
11
10
9
8
7
6
5
4
3
2
1
0
BIT:
REGISTER X
Operation when X
≠
6h:
REGISTER R6
REGISTER M: R4
Operation when X = 6h:
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