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參數(shù)資料
| 型號： | MAX1459AAP |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 2-Wire, 4-20mA Smart Signal Conditioner |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | 5.30 MM, 0.65 MM PITCH, SSOP-20 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 243K |
| 代理商： | MAX1459AAP |
M
2-Wire, 4–20mA
Smart Signal Conditioner
_______________________________________________________________________________________
5
Temperature Sensor Terminal 1
TEMP1
16
Temperature Sensor Terminal 2. R
TEMP
is a 100k
temperature-dependent resistor with 4600ppm/°C
tempco.
TEMP2
17
Output Voltage. OUT is a Rail-to-Railoutput that can drive resistive loads down to 10k
and capacitive
loads up to 0.1μF.
OUT
11
Negative Power Supply
V
SS
12
Sensor Excitation Current Output. The current source that drives the bridge.
BDRIVE
13
Positive Sensor Input. Input impedance is typically 1M
. Rail-to-rail input range.
INP
14
Negative Sensor Input. Input impedance is typically 1M
. Rail-to-rail input range.
INM
15
Auxiliary Op Amp Negative Input
AMP-
7
Auxiliary Op Amp Output
AMPOUT
8
Input pin for an External Temperature-Dependent Reference Voltage for FSOTC DAC and OTC DAC. In the
default mode, the MAX1459 uses the temperature-dependent bridge drive voltage as the FSOTC DAC and
OTC DAC reference.
TEMPIN
9
Current Source Reference. An internal 100k
resistor (R
ISRC
) connects ISRC to V
SS
(see
Functional
Diagram
). Optionally, external resistors can be used in place of or in parallel with R
FTC
and R
ISRC
.
ISRC
10
Auxiliary Op Amp Positive Input
AMP+
6
Buffered Full-Span Output Temperature Coefficient DAC Output. An internal 100k
resistor (R
FTC
) con-
nects FSOTC to ISRC (see
Functional Diagram
). Optionally, external resistors can be used in place of or in
parallel with R
FTC
and R
ISC
.
FSOTC
5
Write Enable, Dual-Function Input Pin. Used to enable EEPROM erase/write operations. Also used to set
the DAC refresh-rate mode. Internally pulled to V
DD
with a 1M
(typ) resistor. See the
Chip-Select (CS)
and Write-Enable (WE)
section.
WE
4
Data Input/Output. Used only during programming/testing. Internally pulled to V
SS
with a 1M
(typical)
resistor. High impedance when CS is low.
DIO
3
Positive Power-Supply Input. Connect a 0.1μF capacitor from V
DD
to V
SS
.
V
DD
20
Clock Output, nominally 50kHz
CK50
18
Chip Current Bias Source. Connect an external 402k
±1% resistor between V
DD
and NBIAS.
NBIAS
19
Pin Description
1
Chip-Select Input. The MAX1459 is selected when this pin is high. When low, OUT and DIO become high
impedance. Internally pulled to V
DD
with a 1M
(typical) resistor. Leave unconnected for normal operation.
CS
2
Data Clock Input. Used only during programming/testing. Internally pulled to V
SS
with a 1M
(typical) resistor.
Data is clocked in on the rising edge of the clock. Recommended SCLK frequency is below 50kHz.
SCLK
PIN
FUNCTION
NAME
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
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