參數資料
型號: MAX1444EHJ+T
廠商: Maxim Integrated Products
文件頁數: 6/20頁
文件大小: 0K
描述: IC ADC 10BIT 40MSPS 32-TQFP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
位數: 10
采樣率(每秒): 40M
數據接口: 并聯(lián)
轉換器數目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-TQFP
供應商設備封裝: 32-TQFP(5x5)
包裝: 帶卷 (TR)
輸入數目和類型: 2 個單端,雙極;1 個差分,雙極
MAX1444
10-Bit, 40Msps, 3.0V, Low-Power
ADC with Internal Reference
14
______________________________________________________________________________________
N - 6
N
N - 5
N + 1
N - 4
N + 2
N - 3
N + 3
N - 2
N + 4
N - 1
N + 5
N
N + 6
N + 1
N + 7
5.5 CLOCK-CYCLE LATENCY
ANALOG INPUT
CLOCK INPUT
DATA OUTPUT
tDO
tAD
tCL
tCH
Figure 6. System and Output Timing Diagram
System Timing Requirements
Figure 6 shows the relationship between the clock
input, analog input, and data output. The MAX1444
samples at the falling edge of the input clock. Output
data is valid on the rising edge of the input clock. The
output data has an internal latency of 5.5 clock cycles.
Figure 5 shows the relationship between the input clock
parameters and the valid output data.
__________Applications Information
Figure 7 shows a typical application circuit containing a
single-ended to differential converter. The internal refer-
ence provides a VDD/2 output voltage for level shifting
purposes. The input is buffered and then split to a volt-
age follower and inverter. A lowpass filter follows the op
amps to suppress some of the wideband noise associ-
ated with high-speed op amps. The user may select the
RISO and CIN values to optimize the filter performance
to suit a particular application. For the application in
Figure 7, an RISO of 50Ω is placed before the capaci-
tive load to prevent ringing and oscillation. The 22pF
CIN capacitor acts as a small bypassing capacitor.
Using Transformer Coupling
An RF transformer (Figure 8) provides an excellent
solution for converting a single-ended source signal to
a fully differential signal, required by the MAX1444 for
optimum performance. Connecting the transformer’s
center tap to COM provides a VDD/2 DC level shift to
the input. Although a 1:1 transformer is shown, a step-
up transformer may be selected to reduce the drive
requirements. A reduced signal swing from the input
driver, such as an op amp, may also improve the over-
all distortion.
In general, the MAX1444 provides better SFDR and
THD with fully differential input signals than single-
ended drive, especially for very high input frequencies.
In differential input mode, even-order harmonics are
lower since both inputs (IN+, IN-) are balanced, and
each of the inputs only requires half the signal swing
compared to single-ended mode.
Single-Ended AC-Coupled Input Signal
Figure 9 shows an AC-coupled, single-ended applica-
tion. The MAX4108 op amp provides high speed, high
bandwidth, low noise, and low distortion to maintain the
integrity of the input signal.
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