參數(shù)資料
型號： MAX1415AEWE+T
廠商： Maxim Integrated Products
文件頁數(shù)： 18/36頁
文件大?。?/td> 0K
描述： IC ADC 16BIT DELTA SIGMA 16-SOIC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1,000
位數(shù)： 16
采樣率（每秒）： 500
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 762mW
電壓電源： 單電源
工作溫度： -45°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個差分，單極；2 個差分，雙極
G2, G1, G0: (Default = 0, 0, 0) Gain-Selection Bits. See
Table 11 for PGA gain settings.
B/U: (Default = 0) Bipolar-/Unipolar-Mode Selection:
Set
B/U = 0 to select bipolar mode. Set B/U = 1 to
select unipolar mode.
BUF: (Default = 0) Buffer-Enable Bit. For unbuffered
mode, disable the internal buffer of the MAX1415/
MAX1416 to reduce power consumption by writing a 0 to
the BUF bit. Write a 1 to this bit to enable the buffer. Use
the internal buffer when acquiring high source-imped-
ance input signals.
FSYNC:
(Default
=
1)
Filter-Synchronization/
Conversion-Start Bit. Set FSYNC = 0 to begin calibration
or conversion. The MAX1415/MAX1416 perform free-run-
ning conversions while FSYNC = 0. Set FSYNC = 1 to
stop converting data and to hold the nodes of the digital
filter, the filter-control logic, the calibration-control logic,
and the analog modulator in a reset state. The
DRDY
output does not reset high if it is low (indicating that valid
data has not yet been read from the data register) when
FSYNC goes high. To clear
DRDY output, read the data
register.
MAX1415/MAX1416
16-Bit, Low-Power, 2-Channel,
Sigma-Delta ADCs
______________________________________________________________________________________
25
Table 6. Communications Register
(MSB)
(LSB)
FUNCTION
COMMUNICATION
START/DATA READY
REGISTER SELECT
READ/WRITE
SELECT
POWER-DOWN
MODE
CHANNEL SELECT
Name
0/
DRDY
RS2
RS1
RS0
R/
W
PD
CH1
CH0
Defaults
0
Table 7. Register Selection
RS2
RS1
RS0
REGISTER
POWER-ON RESET STATUS
REGISTER SIZE
(bits)
0
Communications register
0x00
8
0
1
Setup register
0x01
8
0
1
0
Clock register
0x85
8
0
1
Data register
N/A
16
1
0
Test register*
N/A
8
1
0
1
No operation
—
1
0
Offset register
0x1F 40 00
24
1
Gain register
0x57 61 AB
24
Table 8. Channel Selection
CH1
CH0
AIN+
AIN-
OFFSET/GAIN
REGISTER PAIR
0
AIN1+
AIN1-
0
1
AIN2+
AIN2-
1
0
AIN1-
0
1
AIN1-
AIN2-
2
*The test register is used for factory testing only.
Table 9. Setup Register
(MSB)
(LSB)
FUNCTION
MODE CONTROL
PGA GAIN CONTROL
BIPOLAR/UNIPOLAR
MODE
BUFFER ENABLE
FSYNC
Name
MD1
MD0
G2
G1
G0
B/U
BUF
FSYNC
Defaults
0
1
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參數(shù)描述
MAX1415ENE 制造商:Maxim Integrated Products 功能描述:16-BIT, LOW-POWER, 2-CHANNEL, SIGMA-DELTA ADC - Rail/Tube
MAX1415EPE 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1415EPE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 2Ch .5ksps 1.75V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1415EUE 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1415EUE+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 2Ch .5ksps 1.75V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
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