參數(shù)資料
型號： MAX1320ECM
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： Dual 8-Bit To 9-Bit Parity Bus Transceivers 56-SSOP -40 to 85
中文描述： 8-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC, TQFP-48
文件頁數(shù)： 5/27頁
文件大?。?/td> 255K
代理商： MAX1320ECM
M
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
_______________________________________________________________________________________
5
Note 1:
For the MAX1316/MAX1317/MAX1318, V
IN
= 0 to +5V. For the MAX1320/MAX1321/MAX1322, V
IN
= -5V to +5V. For the
MAX1324/MAX1325/MAX1326, V
IN
= -10V to +10V.
All channel performance is guaranteed by correlation to a single channel test.
Offset nulled.
The analog input resistance is terminated to an internal bias point. Calculate the analog input current using:
V
V
R
CH
_
Note 2:
Note 3:
Note 4:
for V
CH
within the input voltage range.
Note 5:
Throughput rate is given per channel. Throughput rate is a function of clock frequency (f
CLK
= 10MHz). See the
Data
Throughput
section for more information.
All analog inputs are driven with an FS 100kHz sine wave.
Note 6:
I
CH
CH
BIAS
_
_
=
TIMING CHARACTERISTICS (Figures 3, 4, 5, 6 and 7) (Tables 1, 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
1.6
MAX
1.8
UNITS
μs
Clock
cycles
μs
Clock
cycles
Internal clock
Time-to-First-Conversion Result
t
CONV
External clock, Figure 6
16
Internal clock
0.3
0.36
Time-to-Next-Conversion Result
t
NEXT
External clock, Figure 6
3
CONVST Pulse-Width Low
(Acquisition Time)
t
ACQ
(Note 9)
0.16
100
μs
CS
Pulse Width
RD
Pulse-Width Low
RD
Pulse-Width High
WR
Pulse-Width Low
CS
to
WR
WR
to
CS
CS
to
RD
RD
to
CS
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
30
30
30
30
ns
ns
ns
ns
ns
ns
ns
ns
(Note 10)
(Note 10)
(Note 10)
(Note 10)
Data-Access Time
(
RD
Low to Valid Data)
t
10
30
ns
Bus-Relinquish Time (
RD
High)
t
11
30
ns
ns
Internal clock
80
EOC
Pulse Width
t
12
External clock, Figure 6
1
Clock
cycles
ns
ns
μs
ns
ns
MHz
MHz
ns
ns
Input-Data Setup Time
Input-Data Hold Time
External-Clock Period
External-Clock High Period
External-Clock Low Period
External-Clock Frequency
Internal-Clock Frequency
CONVST High to CLK Edge
EOC
Low to
RD
t
14
t
15
t
16
t
17
t
18
10
10
0.08
20
20
0.1
10.00
Logic sensitive to rising edges
Logic sensitive to rising edges
(Note 11)
12.5
10
t
19
t
20
20
(Note 12)
0
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MAX1320ECM+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 8Ch 526ksps 3V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1320ECM+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 8Ch 526ksps 3V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1320ECM-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1320EVB16 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 8-/4-/2-Channel 14-Bit Simultaneous-Sampling ADCs with 10V 5V and 0 to +5V Analog Input Ranges RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
MAX1320EVKIT 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 Evaluation Kit/Evaluation System for the MAX1316 MAX1317 MAX1318 MAX1319 MAX1320 MAX1321 MAX1322 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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