參數資料
型號: MAX1317ECM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 18-Bit Buffers/Drivers With 3-State Outputs 56-SSOP -40 to 85
中文描述: 4-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC, TQFP-48
文件頁數: 8/27頁
文件大小: 255K
代理商: MAX1317ECM
Typic al Operating Charac teristic s (c ontinued)
(AV
DD
= +5V, DV
DD
= +3V, AGND = DGND = 0V, V
REF
= V
REFMS
= +2.5V (external reference), see the
Typical Operating Circuits
sec-
tion, f
CLK
= 10MHz, 50% duty cycle, INTCLK/
EXTCLK
= AGND (external clock), SHDN = DGND, T
A
= +25°C, unless otherwise noted.)
FFT
M
FREQUENCY (MHz)
A
0.20
0.15
0.10
0.05
-120
-100
-80
-60
-40
-20
0
-140
0
0.25
f
ANALOG_IN
= 103kHz
f
SAMPLE
f
CLK
= 10MHz
SINAD = 76.7dB
SNR = 77.0dB
THD = -88.3dB
SFDR = 91.0dB
SIGNAL-TO-NOISE RATIO
vs. CLOCK FREQUENCY
M
f
CLK
(MHz)
S
18
16
14
12
10
71
72
73
74
75
76
77
78
79
80
70
8
20
f
IN
= 100kHz
SIGNAL-TO-NOISE PLUS DISTORTION
vs. CLOCK FREQUENCY
M
f
CLK
(MHz)
S
18
16
14
12
10
71
72
73
74
75
76
77
78
79
80
70
8
20
f
IN
= 100kHz
EFFECTIVE NUMBER OF BITS
vs. CLOCK FREQUENCY
M
f
CLK
(MHz)
E
18
16
14
12
10
8
20
11.0
11.5
12.0
12.5
13.0
13.5
10.5
f
IN
= 100kHz
TOTAL HARMONIC DISTORTION
vs. CLOCK FREQUENCY
M
f
CLK
(MHz)
T
18
16
14
12
10
8
20
-95
-90
-85
-80
-75
-70
-100
SPURIOUS-FREE DYNAMIC RANGE
vs. CLOCK FREQUENCY
M
f
CLK
(MHz)
S
18
16
14
12
10
8
20
65
70
75
80
85
90
95
100
60
M
8-/4-/2-Channel, 14-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
8
_______________________________________________________________________________________
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