參數資料
型號: MAX1308ECM+T
廠商: Maxim Integrated Products
文件頁數: 28/37頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 8CH 4MSPS 48LQFP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,000
位數: 12
采樣率(每秒): 3.65M
數據接口: 并聯(lián)
轉換器數目: 1
功率耗散(最大): 1.82W
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數目和類型: 8 個單端,單極
MAX1304–MAX1306/MAX1308–MAX1310/MAX1312–MAX1314
8-/4-/2-Channel, 12-Bit, Simultaneous-Sampling ADCs
with ±10V, ±5V, and 0 to +5V Analog Input Ranges
34
______________________________________________________________________________________
Aperture Jitter
Aperture Jitter (tAJ) is the sample-to-sample variation in
aperture delay.
Jitter is a concern when considering an ADC’s dynamic
performance, e.g., SNR. To reconstruct an analog input
from the ADC digital outputs, it is critical to know the
time at which each sample was taken. Typical applica-
tions use an accurate sampling clock signal that has
low jitter from sampling edge to sampling edge. For a
system with a perfect sampling clock signal, with no
clock jitter, the SNR performance of an ADC is limited
by the ADC’s internal aperture jitter as follows:
where fIN represents the analog input frequency and
tAJ is the time of the aperture jitter.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC so that the signal’s slew rate does not limit the
ADC’s performance. The input frequency is then swept
up to the point where the amplitude of the digitized
conversion result has decreased by -3dB.
Full-Power Bandwidth
A large, -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB. This point is defined as full-
power input bandwidth frequency.
DC Power-Supply Rejection (PSRR)
DC PSRR is defined as the change in the positive full-
scale transfer function point caused by a ±5% variation
in the analog power-supply voltage (AVDD).
SNR
x
xx f
x t
IN
AJ
=
20
1
2
log
π
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