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參數(shù)資料
| 型號(hào)： | MAX1289EKA-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | MO-178, SOT-23, 8 PIN |
| 文件頁數(shù)： | 12/15頁 |
| 文件大小： | 241K |
| 代理商： | MAX1289EKA-T |
M
Layout, Grounding, and Bypassing
For best performance, use printed circuit (PC) boards.
Wire-wrap configurations are not recommended since
the layout should ensure proper separation of analog
and digital traces. Do not run analog and digital lines
parallel to each other, and do not lay out digital signal
paths underneath the ADC package. Use separate
analog and digital PC board ground sections with only
one starpoint (Figure 11), connecting the two ground
systems (analog and digital). For lowest-noise opera-
tion, ensure the ground return to the star ground
’
s
power supply is low impedance and as short as possi-
ble. Route digital signals far away from sensitive analog
and reference inputs.
High-frequency noise in the power supply (V
DD
) may
degrade the performance of the ADC
’
s fast comparator.
Bypass V
DD
to the star ground with a 0.1μF capacitor,
located as close as possible to the MAX1286
–
MAX1289s
’
power-supply pin. Minimize capacitor lead length for best
supply-noise rejection. Add an attenuation resistor (5
) if
the power supply is extremely noisy.
150ksps, 12-Bit, 2-Channel S ingle-Ended, and
1-Channel True-Differential ADCs in S OT 23
12
______________________________________________________________________________________
CNVST
SCLK
DOUT
CS
SCK
MISO
V
DD
SS
QSPI
MAX1286
–
MAX1289
Figure 9a. QSPI Connections
Table 2. Detailed SSPSTAT Register Content
CONTROL BIT
MAX1286
–
MAX1289
SETTINGS
SYNCHRONOUS SERIAL STATUS REGISTER (SSPSTAT)
SMP
Bit 7
0
SPI Data Input Sample Phase. Input data is sampled at the middle of the data
output time.
CKE
Bit 6
1
SPI Clock Edge Select Bit. Data is transmitted on the rising edge of the serial
clock.
D/A
P
S
R/W
UA
BF
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
Data Address Bit
Stop Bit
Start Bit
Read/Write Bit Information
Update Address
Buffer Full Status Bit
Figure 8c. SPI/MICROWIRE Interface Timing Sequence (CPOL = CPHA = 0)
CNVST
1ST BYTE READ
SCLK
DOUT
2ND BYTE READ
SAMPLING INSTANT
4
1
8
12
B11
MSB
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
LSB
HIGH-Z
16
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| MAX1286EKA-T | 150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 |
| MAX1288EKA-T | 150ksps, 12-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 |
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| MAX128ACAI+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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