參數(shù)資料
型號(hào): MAX127BCAI+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 6/16頁(yè)
文件大?。?/td> 0K
描述: IC DAS 12BIT 2-WIRE 28-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
類型: 數(shù)據(jù)采集系統(tǒng)(DAS),ADC
分辨率(位): 12 b
采樣率(每秒): 8k
數(shù)據(jù)接口: I²C,串行
電壓電源: 單電源
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 帶卷 (TR)
MAX127/MAX128
To power-up from a software initiated power-down, a
START condition followed by the correct slave address
must be received (with R/W = 0). The MAX127/MAX128
power-up after receiving the next bit.
For hardware-controlled power-down (FULLPD), pull
SHDN low. When hardware shutdown is asserted, it
becomes effective immediately and any conversion in
progress is aborted.
Choosing Power-Down Modes
The bandgap reference and reference buffer remain
active in STBYPD mode, maintaining the voltage on the
4.7F capacitor at REF. This is a “DC” state that does
not degrade after standby power-down of any duration.
In FULLPD mode, only the bandgap reference is active.
Connect a 33F capacitor between REF and AGND to
maintain the reference voltage between conversions
and to reduce transients when the buffer is enabled
and disabled. Throughput rates down to 1ksps can be
achieved without allotting extra acquisition time for ref-
erence recovery prior to conversion. This allows con-
version to begin immediately after power-down ends. If
the discharge of the REF capacitor during FULLPD
exceeds the desired limits for accuracy (less than a
fraction of an LSB), run a STBYPD power-down cycle
prior to starting conversions. Take into account that the
reference buffer recharges the bypass capacitor at an
80mV/ms slew rate, and add 50s for settling time.
Auto-Shutdown
Selecting STBYPD on every conversion automatically
shuts the MAX127/MAX128 down after each conversion
without requiring any start-up time on the next conversion.
Multirange, +5V, 12-Bit DAS with
2-Wire Serial Interface
14
______________________________________________________________________________________
REF
10k
2.5V
CREF
4.7
F
2.5V
REFADJ
AV = 1.638
0.01
F
MAX127
MAX128
Figure 11c. External Reference, Reference at REFADJ
100k
510k
24k
REFADJ
+5V
0.01
F
MAX127
MAX128
Figure 12. Reference-Adjust Circuit
REF
10k
2.5V
CREF
4.7
F
0.01
F
REFADJ
AV = 1.638
MAX127
MAX128
Figure 11a. Internal Reference
REF
VDD
10k
2.5V
4.096V
CREF
4.7
F
REFADJ
AV = 1.638
MAX127
MAX128
Figure 11b. External Reference, Reference at REF
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