參數(shù)資料
型號: MAX1267AEEG+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/19頁
文件大小: 0K
描述: IC ADC 12BIT 265KSPS 24-QSOP
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 12
采樣率(每秒): 265k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 5.4mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極;1 個偽差分,單極;1 個偽差分,雙極
MAX1265/MAX1267
265ksps, +3V, 6-/2-Channel, 12-Bit ADCs
with +2.5V Reference and Parallel Interface
______________________________________________________________________________________
11
Together with the input impedance, this capacitor
forms an RC filter, limiting the ADC’s signal bandwidth.
Input Bandwidth
The MAX1265/MAX1267 T/H stage offers a 250kHz full-
linear and a 3MHz full-power bandwidth. This makes it
possible to digitize high-speed transients and measure
periodic signals with bandwidths exceeding the ADC’s
sampling rate by using undersampling techniques. To
avoid high-frequency signals being aliased into the fre-
quency band of interest, anti-alias filtering is recom-
mended.
Starting a Conversion
Initiate a conversion by writing a control byte that selects
the multiplexer channel and configures the MAX1265/
MAX1267 for either unipolar or bipolar operation. A
write pulse (WR + CS) can either start an acquisition
interval or initiate a combined acquisition plus conver-
sion. The sampling interval occurs at the end of the
acquisition interval. The acquisition mode (ACQMOD)
bit in the input control byte (Table 1) offers two options
for acquiring the signal: an internal and an external
acquisition. The conversion period lasts for 13 clock
cycles in either the internal or external clock or acquisi-
tion mode. Writing a new control byte during a conver-
sion cycle aborts the conversion and starts a new
acquisition interval.
Internal Acquisition
Select internal acquisition by writing the control byte
with the ACQMOD bit cleared (ACQMOD = 0). This
causes the write pulse to initiate an acquisition interval
whose duration is internally timed. Conversion starts
when this acquisition interval (three external clock
cycles or approximately 1s in internal clock mode)
ends (Figure 4). Note that, when the internal acquisition
is combined with the internal clock, the aperture jitter
can be as high as 200ps. Internal clock users wishing
to achieve the 50ps jitter specification should always
use external acquisition mode.
Figure 4. Conversion Timing Using Internal Acquisition Mode
tCS
tCSWS
tWR
tACQ
tCONV
tDH
tDS
tINT1
tD0
tTR
HIGH-Z
CS
WR
D11–D0
INT
RD
DOUT
ACQMOD = 0
VALID DATA
CONTROL
BYTE
tCSWH
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MAX1267BCEG+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 2Ch 265ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1267BCEG+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 2Ch 265ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1267BCEG-T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
MAX1267BEEG 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32