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  • 參數(shù)資料
    型號: MAX1230ACEG+
    廠商: Maxim Integrated Products
    文件頁數(shù): 2/23頁
    文件大?。?/td> 0K
    描述: IC ADC 12BIT 300KSPS 24-QSOP
    標(biāo)準(zhǔn)包裝: 50
    位數(shù): 12
    采樣率(每秒): 300k
    數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
    轉(zhuǎn)換器數(shù)目: 1
    功率耗散(最大): 762mW
    電壓電源: 單電源
    工作溫度: 0°C ~ 70°C
    安裝類型: 表面貼裝
    封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
    供應(yīng)商設(shè)備封裝: 24-QSOP
    包裝: 管件
    輸入數(shù)目和類型: 16 個單端,單極;16 個單端,雙極;8 個差分,單極;8 個差分,雙極
    MAX1226/MAX1228/MAX1230
    12-Bit 300ksps ADCs with FIFO,
    Temp Sensor, Internal Reference
    10
    ______________________________________________________________________________________
    Converter Operation
    The MAX1226/MAX1228/MAX1230 ADCs use a fully dif-
    ferential, successive-approximation register (SAR) con-
    version technique and an on-chip T/H block to convert
    temperature and voltage signals into a 12-bit digital
    result. Both single-ended and differential configurations
    are supported, with a unipolar signal range for single-
    ended mode and bipolar or unipolar ranges for differ-
    ential mode.
    Input Bandwidth
    The ADC’s input-tracking circuitry has a 1MHz small-
    signal bandwidth, so it is possible to digitize high-
    speed transient events and measure periodic signals
    with bandwidths exceeding the ADC’s sampling rate by
    using undersampling techniques. Anti-alias prefiltering
    of the input signals is necessary to avoid high-frequen-
    cy signals aliasing into the frequency band of interest.
    Analog Input Protection
    Internal ESD protection diodes clamp all pins to VDD
    and GND, allowing the inputs to swing from (GND -
    0.3V) to (VDD + 0.3V) without damage. However, for
    accurate conversions near full scale, the inputs must
    not exceed VDD by more than 50mV or be lower than
    GND by 50mV. If an off-channel analog input voltage
    exceeds the supplies, limit the input current to 2mA.
    3-Wire Serial Interface
    The MAX1226/MAX1228/MAX1230 feature a serial
    interface compatible with SPI/QSPI and MICROWIRE
    devices. For SPI/QSPI, ensure the CPU serial interface
    runs in master mode so it generates the serial clock
    signal. Select the SCLK frequency of 10MHz or less,
    and set clock polarity (CPOL) and phase (CPHA) in the
    P control registers to the same value. The MAX1226/
    MAX1228/MAX1230 operate with SCLK idling high or
    low, and thus operate with CPOL = CPHA = 0 or CPOL
    = CPHA = 1. Set CS low to latch input data at DIN on
    the rising edge of SCLK. Output data at DOUT is
    updated on the falling edge of SCLK. Bipolar true dif-
    ferential results and temperature sensor results are
    available in two’s complement format, while all others
    are in binary.
    Serial communication always begins with an 8-bit input
    data byte (MSB first) loaded from DIN. Use a second
    byte, immediately following the setup byte, to write to
    the unipolar mode or bipolar mode registers (see
    Tables 1, 3, 4, and 5). A high-to-low transition on CS ini-
    tiates the data input operation. The input data byte and
    the subsequent data bytes are clocked from DIN into
    the serial interface on the rising edge of SCLK.
    Tables 1–7 detail the register descriptions. Bits 5 and 4,
    CKSEL1 and CKSEL0, respectively, control the clock
    modes in the setup register (see Table 3). Choose
    between four different clock modes for various ways to
    start a conversion and determine whether the acquisi-
    tions are internally or externally timed. Select clock
    mode 00 to configure CNVST/AIN_ to act as a conver-
    sion start and use it to request the programmed inter-
    nally timed conversions without tying up the serial bus.
    In clock mode 01, use CNVST to request conversions
    one channel at a time, controlling the sampling speed
    without tying up the serial bus. Request and start inter-
    nally timed conversions through the serial interface by
    writing to the conversion register in the default clock
    mode, 10. Use clock mode 11 with SCLK up to 4.8MHz
    for externally timed acquisitions to achieve sampling
    rates up to 300ksps. Clock mode 11 disables scanning
    and averaging. See Figures 4–7 for timing specifica-
    tions and how to begin a conversion.
    These devices feature an active-low, end-of-conversion
    output. EOC goes low when the ADC completes the
    last-requested operation and is waiting for the next input
    data byte (for clock modes 00 and 10). In clock mode
    01, EOC goes low after the ADC completes each
    requested operation. EOC goes high when CS or
    CNVST goes low. EOC is always high in clock mode 11.
    Single-Ended/Differential Input
    The MAX1226/MAX1228/MAX1230 use a fully differen-
    tial ADC for all conversions. The analog inputs can be
    configured for either differential or single-ended con-
    versions by writing to the setup register (see Table 3).
    Single-ended conversions are internally referenced to
    GND (Figure 3).
    In differential mode, the T/H samples the difference
    between two analog inputs, eliminating common-mode
    DC offsets and noise. IN+ and IN- are selected from
    the following pairs: AIN0/AIN1, AIN2/AIN3, AIN4/AIN5,
    AIN6/AIN7, AIN8/AIN9, AIN10/AIN11, AIN12/AIN13,
    and AIN14/AIN15. AIN0–AIN7 are available on the
    MAX1226, MAX1228, and MAX1230. AIN8–AIN11 are
    only available on the MAX1228 and MAX1230.
    AIN12–AIN15 are only available on the MAX1230. See
    Tables 2–5 for more details on configuring the inputs.
    For the inputs that can be configured as CNVST or an
    analog input, only one can be used at a time. For the
    inputs that can be configured as REF- or an analog
    input, the REF- configuration excludes the analog input.
    Unipolar/Bipolar
    Address the unipolar and bipolar registers through the
    setup register (bits 1 and 0). Program a pair of analog
    channels for differential operation by writing a 1 to the
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    MAX1230ACEG+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 16Ch 300ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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