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參數(shù)資料
| 型號： | MAX1192ETI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 24/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT 22MSPS DL 28-TQFN |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 22M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 28-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，雙極；2 個差分，雙極 |
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MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
6
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3.0V, OVDD = 1.8V, VREFIN = VDD (internal reference), CL
≈ 10pF at digital outputs, fCLK = 22MHz, CREFP = CREFN = CCOM =
0.33F, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Note 1: Specifications
≥+25°C guaranteed by production test, <+25°C guaranteed by design and characterization.
Note 2: SNR, SINAD, SFDR, HD3, and THD are based on a differential analog input voltage of -0.5dB FS referenced to the
amplitude of the digital output. SNR and THD are calculated using HD2 through HD6.
Note 3: The power consumption of the output driver is proportional to the load capacitance (CL).
Note 4: Guaranteed by design and characterization. Not production tested.
Note 5: SINAD settles to within 0.5dB of its typical value.
Note 6: Crosstalk rejection is measured by applying a high-frequency test tone to one channel and a low-frequency tone to the
second channel. FFTs are performed on each channel. The parameter is specified as the power ratio of the first and second
channel FFT test tone bins.
Note 7: Amplitude/phase matching is measured by applying the same signal to each channel, and comparing the magnitude and
phase of the fundamental bin on the calculated FFT.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data
Valid
tDOA
50% of CLK to 50% of data,
Figure 5 (Note 4)
1
6
8.5
ns
CLK Fall to CHB Output Data
Valid
tDOB
50% of CLK to 50% of data,
Figure 5 (Note 4)
1
6
8.5
ns
CLK Rise/Fall to A/
B Rise/Fall
Time
tDA/B
50% of CLK to 50% of A/
B,
Figure 5 (Note 4)
1
6
8.5
ns
PD1 Rise to Output Enable
tEN
PD0 = OVDD
5ns
PD1 Fall to Output Disable
tDIS
PD0 = OVDD
5ns
CLK Duty Cycle
50
%
CLK Duty Cycle Variation
±10
%
Wake-Up Time from Shutdown
Mode
tWAKE, SD (Note 5)
20
s
Wake-Up Time from Standby
Mode
tWAKE, ST (Note 5)
5.4
s
Digital Output Rise/Fall Time
20% to 80%
2
ns
INTERCHANNEL CHARACTERISTICS
Crosstalk Rejection
fIN,X = 5.5MHz at -0.5dB FS,
fIN,Y = 0.3MHz at -0.5dB FS (Note 6)
-75
dB
Amplitude Matching
fIN = 5.5MHz at -0.5dB FS (Note 7)
±0.03
dB
Phase Matching
fIN = 5.5MHz at -0.5dB FS (Note 7)
±0.1
Degrees
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1193ETI | 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1193ETI+ | 功能描述:模數(shù)轉換器 - ADC 8-Bit 2Ch 45Msps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1193ETI+D | 制造商:Maxim Integrated Products 功能描述:ADC DUAL PIPELINED 45MSPS 8BIT PARALLEL 28TQFN - Rail/Tube |
| MAX1193ETI+T | 功能描述:模數(shù)轉換器 - ADC 8-Bit 2Ch 45Msps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1193ETI+TD | 制造商:Maxim Integrated Products 功能描述:ADC DUAL PIPELINED 45MSPS 8BIT PARALLEL 28TQFN - Tape and Reel |
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