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參數(shù)資料
| 型號(hào)： | MAX114-MAX118 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | +5V, 1Msps, 4 & 8-Channel, 8-Bit ADCs with 1レA Power-Down |
| 中文描述： | 5V的，1Msps，4 |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 102K |
| 代理商： | MAX114-MAX118 |
MAX114/MAX118
+5V, 1Msps, 4 & 8-Channel,
8-Bit ADCs with 1A Power-Down
6
_______________________________________________________________________________________
______________________________________________________________Pin Description
Three-State Data Outputs
D1, D2, D3
7, 8, 9
Three-State Data Output (LSB)
D0
6
Lower Limit of Reference Span. REF- sets the zero-code voltage. Range is GND
≤
VREF- < VREF+.
REF-
13
Ground
GND
12
Read Input.
RD must be low to access data (see Digital Interface section).
RD
10
Write-Control Input/Ready-Status Output (see
Digital Interface section)
WR/RDY
15
Upper Limit of Reference Span. REF+ sets the full-scale input voltage. Range is VREF-
< VREF+ ≤ VDD. Internally hard-wired to IN8 (Table 1).
REF+
14
Multiplexer Channel Address Input (MSB)
A2
—
Three-State Data Output (MSB)
D7
20
Positive Supply, +5V
VDD
24
PIN
Mode Selection Input. Internally pulled low with a 50A current source. MODE = 0 acti-
vates read mode; MODE = 1 activates write-read mode (see
Digital Interface Section).
MODE
5
Analog Input Channel 6
IN6
—
FUNCTION
NAME
Power-Down Input.
PWRDN reduces supply current when low.
PWRDN
23
Multiplexer Channel Address Input (LSB)
A0
22
Multiplexer Channel Address Input
A1
21
Analog Input Channel 7
IN7
—
Three-State Data Outputs
D4, D5, D6
17, 18, 19
Chip-Select Input.
CS must be low for the device to recognize WR or RD inputs.
CS
16
9, 10, 11
8
14
12
17
16
23
22
27
7
1
26
25
24
28
19, 20, 21
18
MAX114
MAX118
Analog Input Channel 5
IN5
—
2
Analog Input Channel 2
IN2
3
Analog Input Channel 1
5
IN1
4
6
Analog Input Channel 4
IN4
1
Analog Input Channel 3
3
IN3
2
4
15
Interrupt Output.
INT goes low to indicate end of conversion (see Digital Interface
section).
11
INT
13
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