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參數(shù)資料
| 型號： | MAX11100EWC+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SRL 200KSPS 12WLP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 1.3W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-WFBGA，WLCSP |
| 供應商設備封裝： | 12-WLP |
| 包裝： | 標準包裝 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
| 其它名稱： | MAX11100EWC+TDKR |
Maxim Integrated Products 11
MAX11100
16-Bit, +5V, 200ksps ADC with 10A Shutdown
Variations in frequency, duty cycle, or other aspects of
the clock signal’s shape result in changing offset.
A CS falling edge initiates an acquisition sequence. The
analog input is stored in the capacitive DAC, DOUT
changes from high impedance to logic-low, and the ADC
begins to convert after the sixth clock cycle. SCLK drives
the conversion process and shifts out the conversion
result on DOUT.
SCLK begins shifting out the data (MSB first) after the fall-
ing edge of the 8th SCLK pulse. Twenty-four falling clock
edges are needed to shift out the eight leading zeros
and 16 data bits. Extra clock pulses occurring after the
conversion result has been clocked out, and prior to the
rising edge of CS, produce trailing zeros at DOUT and
have no effect on the converter operation.
Force CS high after reading the conversion’s LSB to
reset the internal registers and place the MAX11100 in
shutdown. For maximum throughput, force CS low again
to initiate the next conversion immediately after the speci-
fied minimum time (tCSW).
Note: Forcing CS high in the middle of a conversion
immediately aborts the conversion and places the
MAX11100 in shutdown.
Figure 6. External Timing Diagram
Figure 7. Shutdown Sequence
CS
SCLK
20
16
24
12
14
8
6
DOUT
D15 D14 D13 D12 D11 D10
D9
D1
D0
D8
D5
D4
D3
D2
D7
D6
tCSH
tTR
tDO
tACQ
tCSS
tCH
tCL
tDV
COMPLETE CONVERSION SEQUENCE
CONVERSION 0
CONVERSION 1
POWERED UP
POWERED DOWN
DOUT
CS
TIMING NOT TO SCALE.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit, +5V, 200ksps ADC with 10μA Shutdown |
| MAX11101EUB | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit, +5V, 200ksps ADC with 10μA Shutdown |
| MAX11101EUB+ | 功能描述:模數(shù)轉換器 - ADC 14-Bit 5V 200ksps w/10uA Shutdown RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11101EUB+T | 功能描述:模數(shù)轉換器 - ADC 14-Bit 5V 200ksps w/10uA Shutdown RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11101EWC | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit, +5V, 200ksps ADC with 10μA Shutdown |
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