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參數(shù)資料
| 型號： | MAX11100EUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SRL 200KSPS 10UMAX |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 444mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-uMAX |
| 包裝： | 標準包裝 |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
| 其它名稱： | MAX11100EUB+TDKR |
Maxim Integrated Products 12
MAX11100
16-Bit, +5V, 200ksps ADC with 10A Shutdown
Output Coding and Transfer Function
The data output from the MAX11100 is binary and Figure 8
depicts the nominal transfer function. Code transitions
occur halfway between successive-integer LSB values
(VREF = 4.096V and 1 LSB = 63FV or 4.096V/65536).
Applications Information
External Reference
The MAX11100 requires an external reference with a
+3.8V and AVDD voltage range. Connect the external
reference directly to REF. Bypass REF to AGND with
a 4.7FF capacitor. When not using a low-ESR bypass
capacitor, use a 0.1FF ceramic capacitor in parallel with
the 4.7FF capacitor. Noise on the reference degrades
conversion accuracy.
The input impedance at REF is 40kI for DC currents.
During a conversion the external reference at REF must
deliver 100FA of DC load current and have an output
impedance of 10I or less.
For optimal performance, buffer the reference through
an op amp and bypass the REF input. Consider the
MAX11100’s equivalent input noise (38FVRMS) when
choosing a reference.
Input Buffer
Most applications require an input buffer amplifier to
achieve 16-bit accuracy. If the input signal is multiplexed,
switch the input channel immediately after acquisition,
rather than near the end of or after a conversion (Figure 9).
This allows the maximum time for the input buffer ampli-
fier to respond to a large step change in the input signal.
The input amplifier must have a slew rate of at least 2V/Fs
to complete the required output-voltage change before
the beginning of the acquisition time.
At the beginning of the acquisition, the internal sam-
pling capacitor array connects to AIN (the amplifier
output), causing some output disturbance. Ensure that
the sampled voltage has settled before the end of the
acquisition time.
Digital Noise
Digital noise can couple to AIN and REF. The conversion
clock (SCLK) and other digital signals active during input
acquisition contribute noise to the conversion result.
Noise signals synchronous with the sampling interval
result in an effective input offset. Asynchronous signals
produce random noise on the input, whose high-frequen-
cy components can be aliased into the frequency band
of interest. Minimize noise by presenting a low imped-
ance (at the frequencies contained in the noise signal)
at the inputs. This requires bypassing AIN to AGND, or
buffering the input with an amplifier that has a small-
signal bandwidth of several MHz, or preferably both. AIN
has 4MHz (typ) of bandwidth.
Distortion
Avoid degrading dynamic performance by choosing an
amplifier with distortion much less than the MAX11100’s
total harmonic distortion (THD = -102dB at 1kHz) at
frequencies of interest. If the chosen amplifier has
insufficient common-mode rejection, which results in
degraded THD performance, use the inverting configu-
ration (positive input grounded) to eliminate errors from
this source. Low temperature-coefficient, gain-setting
resistors reduce linearity errors caused by resistance
changes due to self-heating. To reduce linearity errors
due to finite amplifier gain, use amplifier circuits with suf-
ficient loop gain at the frequencies of interest.
DC Accuracy
To improve DC accuracy, choose a buffer with an offset
much less than the MAX11100’s offset (1mV (max) for
+5V supply), or whose offset can be trimmed while main-
taining stability over the required temperature range.
Figure 8. Unipolar Transfer Function, Full Scale (FS) = VREF,
Zero Scale (ZS) = GND
OUTPUT CODE
FULL-SCALE
TRANSITION
11 . . . 111
11 . . . 110
11 . . . 101
00 . . . 011
00 . . . 010
00 . . . 001
00 . . . 000
12
3
0
FS
FS - 3/2 LSB
FS = VREF
INPUT VOLTAGE (LSB)
1 LSB = VREF
65536
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11100EWC | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:16-Bit, +5V, 200ksps ADC with 10μA Shutdown |
| MAX11100EWC+ | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:16-Bit, 5V, 200ksps ADC with 10??A Shutdown |
| MAX11100EWC+T | 功能描述:模數(shù)轉換器 - ADC 16-Bit 5V 200ksps w/10uA Shutdown RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit, +5V, 200ksps ADC with 10μA Shutdown |
| MAX11101EUB | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit, +5V, 200ksps ADC with 10μA Shutdown |
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