8- and 4-Channel, ±3 x VREF Multirange Inputs, Serial 14-Bit ADCs 22 Maxim Integrated M" />
參數(shù)資料
型號： MAX1033EUP+T
廠商： Maxim Integrated Products
文件頁數(shù)： 15/32頁
文件大?。?/td> 0K
描述： IC ADC 14BIT SER 115KSPS 20TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
位數(shù)： 14
采樣率（每秒）： 115k
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 879mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個單端，單極；4 個單端，雙極；2 個差分，單極；2 個差分，雙極
MAX1032/MAX1033
8- and 4-Channel, ±3 x VREF
Multirange Inputs, Serial 14-Bit ADCs
22
Maxim Integrated
Mode Control
The MAX1032/MAX1033 contain one byte-wide mode-
control register. The timing diagram of Figure 15 shows
how to use the mode-control byte, and the mode-con-
trol byte format is shown in Table 7. The mode-control
byte is used to select the conversion method and to
control the power modes of the MAX1032/MAX1033.
Selecting the Conversion Method
The conversion method is selected using the mode-
control byte (see the
Mode Control section), and the con-
version is initiated using a conversion-start command
(Table 3, and Figures 2, 3, and 4).The MAX1032/
MAX1033 convert analog signals to digital data using one
of three methods:
External Clock Mode, Mode 0 (Figure 2)
Highest maximum throughput (see the
Electrical
Characteristics table)
User controls the sample instant
CS remains low during the conversion
User supplies SCLK throughout the ADC con-
version and reads data at DOUT
External Acquisition Mode, Mode 1 (Figure 3)
Lowest maximum throughput (see the
Electrical
Characteristics table)
User controls the sample instant
User supplies two bytes of SCLK, then drives
CS high to relieve processor load while the
ADC converts
After SSTRB transitions high, the user supplies
two bytes of SCLK and reads data at DOUT
Internal Clock Mode, Mode 2 (Figure 4)
High maximum throughput (see the
Electrical
Characteristics table)
The internal clock controls the sampling instant
1 LSB =
FSR x VREF
16,384 x 4.096V
BINARY
OUTPUT
CODE
(LSB
[hex])
3FFF
3FFE
3FFD
2001
2000
1FFF
0003
0002
0001
0000
FSR
0
1
2
3
8,192
16,381 16,383
INPUT VOLTAGE (LSB [DECIMAL])
(AGND1)
FSR
Figure 13. Ideal Unipolar Transfer Function, Single-Ended
Input, -FSR to 0
1 LSB =
FSR x VREF
16,384 x 4.096V
BINARY
OUTPUT
CODE
(LSB
[hex])
3FFF
3FFE
3FFD
2001
2000
1FFF
0003
0002
0001
0000
FSR
0
1
2
3
8,192
16,381 16,383
INPUT VOLTAGE (LSB [DECIMAL])
(AGND1)
FSR
Figure 14. Ideal Unipolar Transfer Function, Single-Ended
Input, 0 to +FSR
1 LSB =
FSR x VREF
16,384 x 4.096V
BINARY
OUTPUT
CODE
(LSB
[hex])
3FFF
3FFE
3FFD
2001
2000
1FFF
0003
0002
0001
0000
FSR
-8,192 -8,190
0
+8,189 +8,191
INPUT VOLTAGE (LSB [DECIMAL])
AGND1 (DIF/SGL = 0)
CH_- (DIF/SGL = 1)
FSR
-1
+1
Figure 12. Ideal Bipolar Transfer Function, Single-Ended or
Differential Input
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