參數(shù)資料
型號(hào): MAC7106VAG50
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Microcontroller Family Hardware Specifications
中文描述: 微控制器系列硬件規(guī)格
文件頁(yè)數(shù): 30/56頁(yè)
文件大?。?/td> 471K
代理商: MAC7106VAG50
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Electrical Characteristics
Freescale Semiconductor
30
Figure 11. SPI Master Timing (CPHA = 0)
Figure 12. SPI Master Timing (CPHA = 1)
MSB Out
(2)
MSB In
(2)
PCS
x
SCK
(CPOL = 0)
(OUTPUT)
SCK
(CPOL = 1)
(OUTPUT)
(OUTPUT)
Bit 6 ... 1
SIN
(INPUT)
SOUT
(OUTPUT)
LSB Out
LSB In
Bit 6 ... 1
U2
U1b
U3
U4
U4
U12
U5
U6
U11
U9
U9
U10
1. If configured as output.
2. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
PCS
x
SCK
(CPOL = 0)
(OUTPUT)
SCK
(CPOL = 1)
(OUTPUT)
(OUTPUT)
Bit 6 ... 1
SIN
(INPUT)
SOUT
(OUTPUT)
LSB In
Bit 6 ... 1
Port Data
Port Data
Master LSB Out
U10
U9
U6
U11
U12
U11
U5
U4
U4
U2
U1b
U3
U12
MSB Out
(2)
MSB In
(2)
1. If configured as output.
2. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
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