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參數(shù)資料
| 型號(hào)： | M7702S1LHP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| 中文描述： | 單片微機(jī)16位的CMOS（16位單片機(jī)） |
| 文件頁(yè)數(shù)： | 7/20頁(yè) |
| 文件大?。?/td> | 272K |
| 代理商： | M7702S1LHP |
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MITSUBISHI MICROCOMPUTERS
M37702M2LXXXGP, M37702S1LGP
M37702M2LXXXHP, M37702S1LHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
MEMORY
The memory map is shown in Figure 3.
ADDRESSING MODES
The M37702M2LXXXGP has 28 powerful addressing modes.
Refer to the 7700 Family addressing mode description for the de-
tails of each addressing mode.
MACHINE INSTRUCTION LIST
The M37702M2LXXXGP has 103 machine instructions. Refer to
the 7700 Family machine instruction list for details.
DATA REQUIRED FOR MASK ORDERING
Please send the following data for mask orders.
M37702M2LXXXGP;
(1) M37702M2LXXXGP mask ROM order confirmation form
(2) 80P6S mark specification form
(3) ROM data (EPROM 3 sets)
M37702M2LXXXHP;
(1) M37702M2LXXXHP mask ROM order confirmation form
(2) 80P6D mark specification form
(3) ROM data (EPROM 3 sets)
Fig. 2 Example of a reset circuit (perform careful evaluation
at the system design level before using)
Fig. 3 Memory map
V
CC
RESET
0V
0V
2.7V
0.55V
Power on
M37702M2LXXXGP
67
26
V
CC
RESET
A-D conversion
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT
2
INT
0
Watchdog timer
DBC
BRK instruction
Zero divide
RESET
Peripheral devices
control registers
Interrupt vector table
000000
16
00FFFF
16
010000
16
01FFFF
16
Bank 0
16
Bank 1
16
FE0000
16
FEFFFF
16
FF0000
16
FFFFFF
16
Bank FF
16
Bank FE
16
00FFFF
16
00FFD6
16
00027F
16
000000
16
00007F
16
000080
16
Internal RAM
512 bytes
00FFFE
16
00FFD6
16
00007F
16
000000
16
UART1 transmission
UART1 receive
UART0 transmission
UART0 receive
INT
1
00C000
16
Internal ROM
16K bytes
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