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參數(shù)資料
| 型號： | M7702M2L |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| 中文描述： | 單片微機(jī)16位的CMOS（16位單片機(jī)） |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 272K |
| 代理商： | M7702M2L |
14
MITSUBISHI MICROCOMPUTERS
M37702M2LXXXGP, M37702S1LGP
M37702M2LXXXHP, M37702S1LHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
P 0
P 1
P 2
P 3
P 4
P 5
P 6
P 7
P 8
φ
1
E
100 pF
Limits
Symbol
Parameter
Unit
t
d(P0A–E)
t
d(E–P1Q)
t
PXZ(E–P1Z)
t
d(P1A–E)
t
d(P1A–ALE)
t
d(E–P2Q)
t
PXZ(E–P2Z)
t
d(P2A–E)
t
d(P2A–ALE)
t
d(
φ
1–HLDA)
t
d(ALE–E)
t
W(ALE)
t
d(BHE–E)
t
d(R/W–E)
t
d(E–
φ
1)
t
h(E–P0A)
t
h(ALE–P1A)
t
h(E–P1Q)
t
PZX(E–P1Z)
t
h(E–P1A)
t
h(ALE–P2A)
t
h(E–P2Q)
t
PZX(E–P2Z)
t
h(E–BHE)
t
h(E–R/W)
t
W(EL)
Port P0 address output delay time
Port P1 data output delay time (BYTE = “L”)
Port P1 floating start delay time (BYTE = “L”)
Port P1 address output delay time
Port P1 address output delay time
Port P2 data output delay time
Port P2 floating start delay time
Port P2 address output delay time
_____
ALE output delay time
ALE pulse width
____
R/W output delay time
φ
1
output delay time
Port P0 address hold time
Port P1 address hold time (BYTE = “L”)
Port P1 data hold time (BYTE = “L”)
Port P1 floating release delay time (BYTE = “L”)
Port P1 address hold time (BYTE = “H”)
Port P2 address hold time
Port P2 data hold time
Port P2 floating release delay time
____
R/W hold time
_
E pulse width
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Memory expansion mode and microprocessor mode
(when wait bit = “1”)
Min.
50
50
40
50
40
4
60
50
50
0
50
9
50
95
50
9
50
95
18
18
210
Max.
130
10
130
10
120
40
Test conditions
Fig. 4
Fig. 4 Testing circuit for ports P0–P8,
φ
1
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