參數(shù)資料
型號(hào): M66291GP
元件分類(lèi): 總線(xiàn)控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù): 94/126頁(yè)
文件大?。?/td> 893K
代理商: M66291GP
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M66291GP/HP
Rev 1.01 2004.11.01 page 7 of 122
1.3 Pin Functions
Item
Pin name
Input/
Output
Function
Pin
Count
D7~D0
Input/
Output
Data Bus
This is a data bus to access the register from the system bus.
8
D14/P6~
D8/P0
Input/
Output
Data Bus / Port Signal
P6 to P0 are used as port signals when selected to 8-bit bus interface.
D14 to D8 are used as data signals when selected to 16-bit bus interface.
7
D15/A0
Input/
Output
D15 Signal / A0 Signal
A0 (LSB) is used as an address signal when selected to 8-bit bus interface.
D15 (MSB) is used as an data signal when selected to 16-bit bus interface.
1
A6~A1
Input
Address Bus
This is an address bus to access the register from the system bus.
6
*CS
Input
Chip Select
"L" level enables communication with the M66291.
1
*LWR
Input
Low-write Strobe
The lower data (D7 to D0) is written to the register at “L” level.
1
*HWR/*BYTE Input
High-write Strobe / Bus Width Select
With the reset signal set to “H” level, the 8-bit bus interface is selected if this
pin is at “L” level. Further, if this pin is at “H” level, the 16-bit bus interface is
selected. When the 16-bit bus interface is selected, the upper data (D15 to
D8) is written to the register at “L” level.
Fix to “L” level when set to 8-bit bus interface.
1
Bus
interface
*RD
Input
Read Strobe
Data are read from registers at "L" level
1
*INT0
(Note 1)
Output
Interrupt 0
Interrupts are requested to the system at "L" level.
1
Interrupt
interface
*INT1/*SOF
(Note 1)
Output
Interrupt 1 / SOF Output
This pin is used as an interrupt 1 or as a SOF output pin to transmit USB SOF
signal according to register setting.
1
DMA
interface
*Dreq0
(Note 1)
Output
DMA Request 0
This pin is used to request DMA transfer to endpoint FIFO for DMA channel 0.
1
*Dack0
(Note 1)
Input
DMA Acknowledge 0
This pin enables access of FIFO by DMA transfer for DMA channel 0.
1
*Dreq1
(Note 1)
Output
DMA Request 1
This pin is used to request DMA transfer to endpoint FIFO for DMA channel 1.
1
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