參數(shù)資料
型號: M66004SP
元件分類: 顯示控制器
英文描述: 36 X 16 DOTS FLUORESCENT DSPL CTRL, PDIP64
封裝: PLASTIC, DIP-64
文件頁數(shù): 14/15頁
文件大小: 3009K
代理商: M66004SP
M66238FP
REJ03F0268-0200 Rev.2.00 Mar 18, 2008
Page 8 of 14
2. Operating mode setting commands
Address (A1, A0) = (1, 0) allows setting of one-shot pulse polarity and width, trigger edge, M66238 entire halt,
charge pump and VCO halt, phase comparator UP/DOWN output, LPF cutoff, CKO/PLLO switching, VCO
switching and charge pump switching.
Data Bit
Description
Default
0
D0
1
0
D1
1
Setting of trigger edge
D1
D0
Description
0
Synchronizes with TR
CKO is stopped when TR = "H"
0
1
Synchronizes with TR
CKO is stopped when TR = "L"
1
0
Synchronizes with TR
CKO is output when TR = "H"
1
Synchronizes with TR
CKO is output when TR = "L"
0
When trigger occurs: spike of sync clock is not eliminated.
D2
1
When trigger occurs: spike of sync clock is eliminated (disabled when D1 = 1).
0
Polarity of one-shot pulse: Negative pulse
D3
1
Polarity of one-shot pulse: Positive pulse
0
D4
1
0
D5
1
Setting of one-shot pulse width
D5
D4
Description
0
CKO 2-cycle width
0
1
CKO 4-cycle width
1
0
CKO 8-cycle width
1
CKO 16-cycle width
0
CKO/PLLO pin: CKO output
D6
1
CKO/PLLO pin: PLLO output
0
Entire M66238: Operating state
D7
1
Entire M66238: Halt state
0
VCO: Operating state
D8
1
VCO: Halt state
0
Charge pump: ON
D9
1
Charge pump: OFF
0
Low pass filter: Operating state
D10
1
Low pass filter: Separated
0
Normal use: Not output to outside
D11
1
Phase comparator UP/DOWN output enable
0
Normal use
D12
1
VCO test circuit set
0
Normal use
D13
1
Charge pump test circuit set
0
Normal use
D14
1
15-bit counter test clock enable
0
Normal use
D15
1
Sync clock generator test clock enable
0
Normal use
D16
1
Sync clock generator test input enable
0
Normal use
D17
1
12-bit counter test output enable
0
Normal use
D18
1
15-bit counter test output enable
0
Normal use
D19
1
Sync clock generator trigger test output enable
0
Normal use
D20
1
Sync clock generator test output enable
0
D21
:
D29
In normal use: "0" set
0
:
0
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