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參數(shù)資料
| 型號(hào)： | M62320P |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 8-BIT I/O EXPANDER for I2C BUS |
| 中文描述： | 8位I / O擴(kuò)展I2C總線 |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 66K |
| 代理商： | M62320P |
MITSUBISHI < STD. LINEAR ICs >
M62320P,FP
8-BIT I/O EXPANDER for I
C BUS
2/20,1998(rev) ( / 9 )
MITSUBISHI ELECTRIC
2
1. Write mode : I
C BUS data input to Parallel data output
2. Read mode :Parallel data input to I C BUS data output
DIGITAL DATA FORMAT
8bit data
D2
D1
D0
D3
D4
D5
D6
D7
First
MSB
Last
LSB
I/O setting data (I/O setting of parallel data I/O terminals.)
P2
P1
P0
P3
P4
P5
P6
P7
First
MSB
Last
LSB
DATA INPUT from parallel data terminals = Low
DATA OUTPUT to parallel data terminals = High
S : Start Condition
While SCL level is high, SDA line level should be changed from high to low.
P : Stop condition
While SCL level is high, SDA level should be changed from low to high.
W: Write (SDA = LOW), R : Read (SDA = HIGH)
A: Acknowledge bit
Lower three bits (A0,A1,A2) are a programmable address.
This IC is accessed only when the lower 3 bits data of slave
address coincide with the data of CS0 to CS2. (refer to the
right table)
Slave address
First
MSB
Last
LSB
0
1
1
1
A2
A1
A0
Each bit data corresponds to the I/O state of
the parallel data terminals.
First
Last
Transmission from Master (MCU etc.) to Slave (M62320)
Transmission from Slave (M62320) to Master (MCU etc.)
Chip select data
MSB
A2
A1
LSB
A0
(L=Low,H=High)
A
A
A
S
SLAVE ADDRESS W
A
8BIT DATA
P
I/O SETTING
A
8BIT DATA
8BIT
DATA
0
0
0
1
0
0
0
1
0
L
L
L
L
L
H
L
H
L
H
1
1
1
H
H
CS2
CS1 CS0
Last
First
A
A
S
SLAVE ADDRESS W
A
8BIT DATA
P
8BIT DATA A
8BIT DATA
8BIT
DATA
A
6
2
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| M62332FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-bit 2ch I2C BUS D/A Converter with Buffer Amplifiers |
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| M62332P_08 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:8-bit 2ch I2C BUS D/A Converter with Buffer Amplifiers |
| M62333FP | 制造商:Renesas Electronics Corporation 功能描述: |
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