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參數(shù)資料
| 型號： | M48T559YMH1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 時鐘/數(shù)據(jù)恢復及定時提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封裝： | 0.330 INCH, PLASTIC, SOH-28 |
| 文件頁數(shù)： | 3/26頁 |
| 文件大?。?/td> | 364K |
| 代理商： | M48T559YMH1 |
11/26
M48T559Y
Setting the Alarm Clock
Registers 1FF5h-1FF2h contain the alarm set-
tings. The alarm can be configured to go off at a
prescribed time on a specific month, date, hour,
minute, or second or repeat every month, day,
hour, minute, or second. It can also be pro-
grammed to go off while the M48T559Y is in the
battery back-up to serve as a system wake-up call.
Bits RPT1–RPT4 put the alarm in the repeat mode
of operation. Table 5., page 11 shows the possible
configurations. Codes not listed in the table default
to the once per second mode to quickly alert the
user of an incorrect alarm setting.
Note: User must transition address (or toggle chip
enable) to see Flag Bit change.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT1–RPT4, the AF (Alarm Flag) is set. If AFE
(Alarm Flag Enable) is also set, the alarm condi-
tion activates the IRQ/FT pin. To disable alarm,
write '0' to the Alarm Date Register and to RPT1-
RPT4. The Alarm Flag and the IRQ/FT output are
cleared by a READ to the Flags Register as shown
in Figure 7., page 11. A subsequent READ to the
Flags Register is necessary to see that the value
of the Alarm Flag has been reset to '0.'
Note: If an alarm condition occurs while the Flags
Register address is latched into the address buff-
er, the alarm flag will not be set until an address
other than the Flags Register (1FF0h) is latched
into the address buffer. This will insure that the
alarm flag will not be inadvertently reset while
reading the flag register. To properly check to see
if an alarm condition has occurred while reading
the flag register, the user is required to latch, read
or write to an alternate address and then re-read
the alarm flag.
The IRQ/FT pin can also be activated in the bat-
tery back-up mode. The IRQ/FT will go low if an
alarm occurs and both ABE (Alarm in Battery
Back-up Mode Enable) and AFE are set. The ABE
and AFE Bits are reset during power-up, therefore
an alarm generated during power-up will only set
AF. The user can read the Flag Register at system
boot-up to determine if an alarm was generated
while the M48T559Y was in the deselect mode
during power-up. Figure 8., page 12 illustrates the
back-up mode alarm timing.
Figure 7. Alarm Interrupt Reset Waveform
Table 5. Alarm Repeat Modes
RPT4
RPT3
RPT2
RPT1
Alarm Activated
11
Once per Second
1
0
Once per Minute
11
00
Once per Hour
10
00
Once per Day
0
Once per Month
AI01677B
AD0-AD7
ACTIVE FLAG BIT
ADDRESS 1FF0h
R
IRQ/FT
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| M48T559Y-MH1 | 功能描述:RAM其它 8KX8 TIMEKEEPR RoHS:否 制造商:Freescale Semiconductor 封裝:Tray |
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