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參數(shù)資料
| 型號(hào)： | M48ST59W-70MH1TR |
| 廠商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
| 封裝： | 0.330 INCH, SNAPHAT, PLASTIC, SOH-44 |
| 文件頁(yè)數(shù)： | 7/29頁(yè) |
| 文件大小： | 158K |
| 代理商： | M48ST59W-70MH1TR |
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M48ST59W
CLOCK OPERATIONS
Reading the Clock
Updates to the TIMEKEEPER registers should
be halted before clock data is read to prevent
reading data in transition. Because the BiPORT
TIMEKEEPER cells in the RAM array are only
data registers, and not the actual clock counters,
updating the registers can be halted without dis-
turbing the clock itself.
Updating is halted when a ’1’ is written to the
READ Bit, D6 in the Control register (1FF8h). As
long as a ’1’ remains in that position, updating is
halted.
After a halt is issued, the registers reflect the
count; that is, the day, date, and the time that were
current at the moment the halt command was is-
sued.
All of the TIMEKEEPER registers are updated si-
multaneously. A halt will not interrupt an update in
progress. Updating occurs within a second after
the bit is reset to a ’0.’
Setting the Clock
Bit D7 of the Control register (1FF8h) is the
WRITE Bit. Setting the WRITE Bit to a ’1,’ like the
READ Bit, halts updates to the TIMEKEEPER reg-
isters. The user can then load them with the cor-
rect day, date, and time data in 24 hour BCD
format (see Table 11, page 16).
Resetting the WRITE Bit to a ’0’ then transfers the
values of all time registers (1FF9h-1FFFh) to the
actual TIMEKEEPER counters and allows normal
operation to resume. After the WRITE Bit is reset,
the next clock update will occur within approxi-
mately one second.
Note: Upon power-up following a power failure,
both the WRITE Bit and the READ Bit will be reset
to ‘0’.
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the
device is going to spend a significant amount of
time on the shelf, the oscillator can be turned off to
minimize current drain on the battery. The STOP
Bit is the MSB of the seconds register. Setting it to
a ’1’ stops the oscillator. When reset to a ’0’, the
M48ST59W oscillator starts within one second.
Note: It is not necessary to set the WRITE Bit
when setting or resetting the FREQUENCY TEST
Bit (FT), the STOP Bit (ST) or the CENTURY EN-
ABLE Bit (CEB).
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| M48ST59W-100MH1 | 0 TIMER(S), REAL TIME CLOCK, PDSO44 |
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| M48T18-100MH1 | 0 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M48T18-150PC1 | 0 TIMER(S), REAL TIME CLOCK, PDIP28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M48T02 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0V, 16 Kbit (2Kb x 8) TIMEKEEPER SRAM |
| M48T02_03 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0V, 16 Kbit (2Kb x 8) TIMEKEEPER㈢ SRAM |
| M48T02_07 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0V, 16 Kbit (2Kb x 8) TIMEKEEPER SRAM |
| M48T02_10 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:5.0 V, 16 Kbit (2 Kb x 8) TIMEKEEPER? SRAM |
| M48T02-120PC1 | 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:CMOS 8K x 8 TIMEKEEPER SRAM |
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