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參數(shù)資料
| 型號(hào)： | M45PE10-VMN6P |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | FLASH |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位統(tǒng)一部門，串行閃存 |
| 文件頁數(shù)： | 2/34頁 |
| 文件大?。?/td> | 454K |
| 代理商： | M45PE10-VMN6P |
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M45PE10
10/34
INSTRUCTIONS
All instructions, addresses and data are shifted in
and out of the device, most significant bit first.
Serial Data Input (D) is sampled on the first rising
edge of Serial Clock (C) after Chip Select (S) is
driven Low. Then, the one-byte instruction code
must be shifted in to the device, most significant bit
first, on Serial Data Input (D), each bit being
latched on the rising edges of Serial Clock (C).
The instruction set is listed in Table 4.
Every instruction sequence starts with a one-byte
instruction code. Depending on the instruction,
this might be followed by address bytes, or by data
bytes, or by both or none.
In the case of a Read Data Bytes (READ), Read
Data Bytes at Higher Speed (Fast_Read) or Read
Status Register (RDSR) instruction, the shifted-in
instruction sequence is followed by a data-out se-
quence. Chip Select (S) can be driven High after
any bit of the data-out sequence is being shifted
out.
In the case of a Page Write (PW), Page Program
(PP), Page Erase (PE), Sector Erase (SE), Write
Enable (WREN), Write Disable (WRDI), Deep
Power-down (DP) or Release from Deep Power-
down (RDP) instruction, Chip Select (S) must be
driven High exactly at a byte boundary, otherwise
the instruction is rejected, and is not executed.
That is, Chip Select (S) must driven High when the
number of clock pulses after Chip Select (S) being
driven Low is an exact multiple of eight.
All attempts to access the memory array during a
Write cycle, Program cycle or Erase cycle are ig-
nored, and the internal Write cycle, Program cycle
or Erase cycle continues unaffected.
Table 4. Instruction Set
Instruction
Description
One-byte Instruction Code
Address
Bytes
Dummy
Bytes
Data
Bytes
WREN
Write Enable
0000 0110
06h
0
WRDI
Write Disable
0000 0100
04h
0
RDID
Read Identification
1001 1111
9Fh
0
1 to 3
RDSR
Read Status Register
0000 0101
05h
0
1 to
∞
READ
Read Data Bytes
0000 0011
03h
3
0
1 to
∞
FAST_READ
Read Data Bytes at Higher Speed
0000 1011
0Bh
3
1
1 to
∞
PW
Page Write
0000 1010
0Ah
3
0
1 to 256
PP
Page Program
0000 0010
02h
3
0
1 to 256
PE
Page Erase
1101 1011
DBh
3
0
SE
Sector Erase
1101 1000
D8h
3
0
DP
Deep Power-down
1011 1001
B9h
0
RDP
Release from Deep Power-down
1010 1011
ABh
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M45PE10-VMN6T | 4 Mbit Uniform Sector, Serial Flash Memory |
| M45PE10-VMN6TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M45PE10-VMN6TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M45PE10-VMP6 | 4 Mbit Uniform Sector, Serial Flash Memory |
| M45PE10-VMP6P | 4 Mbit Uniform Sector, Serial Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M45PE10-VMN6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface |
| M45PE10-VMN6TG | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:1-Mbit, page-erasable serial flash memory with byte-alterability and 75 MHz SPI bus interface |
| M45PE10-VMN6TP | 功能描述:閃存 SERIAL FLASH 1 Mbit Datas RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M45PE10-VMP6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface |
| M45PE10-VMP6G | 功能描述:閃存 1 Mbit Lo Vltg Page Erasable Seral 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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