參數(shù)資料
型號(hào)： M41T82ZQA6E
廠商： STMICROELECTRONICS
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 1 TIMER(S), REAL TIME CLOCK, QCC16
封裝： 4 X 4 MM, ROHS COMPLIANT, QFN-16
文件頁(yè)數(shù)： 37/58頁(yè)
文件大小： 462K
代理商： M41T82ZQA6E
Clock operation
M41T82 M41T83
3.13
Oscillator fail detection
If the Oscillator Fail (OF) bit is internally set to a '1,' this indicates that the oscillator has
either stopped, or was stopped for some period of time. This bit can be used to judge the
validity of the clock and date data. This bit will be set to '1' any time the oscillator stops.
In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the
STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the
oscillator. The following conditions can cause the OF bit to be set:
●
The first time power is applied (defaults to a '1' on power-up).
Note:
If the OF bit cannot be written to '1' 4 seconds after the initial power-up, the STOP bit (ST)
should be written to a '1,' then immediately reset to '0.'
●
The voltage present on VCC or battery is insufficient to support oscillation.
●
The ST bit is set to '1.'
●
External interference of the crystal
For the M41T83, if the Oscillator Fail Interrupt Enable bit (OFIE) is set to a '1,' the
IRQ1/FT/OUT pin will also be activated. The IRQ1/FT/OUT output is cleared by resetting the
OFIE or OF bit to '0' (NOT by reading the Flag Register).
The OF bit will remain set to '1' until written to logic '0.' The oscillator must start and have
run for at least 4 seconds before attempting to reset the OF bit to '0.' If the trigger event
occurs during a power down condition, this bit will be set correctly.
3.14
Oscillator fail interrupt enable (M41T83 only)
If the Oscillator Fail Interrupt Enable bit (OFIE) is set to a '1,' the IRQ1/FT/OUT pin will also
be activated. The IRQ1/FT/OUT output is cleared by resetting the OFIE or OF bit to '0' (not
by reading the Flags Register).
3.15
Initial power-on defaults
Upon initial application of power to the device, the register bits will initially power-on in the
state indicated in Table 15 and Table 16.
Table 15.
Initial power-on default values (part 1)
Condition(1)
1.
All other control bits power-up in an undetermined state.
ST
CB1 CB0 OUT
FT
DCS
ACS
Digital
calib.
Analog
calib.
OFIE
(2)
2.
M41T83 only.
Watchdog
(3)
3.
BMB0-BMB4, RB0, RB1.
A1IE
SQWE
ABE
Initial
Power-up
00
0
1
0
1
0
Subsequent
Power-up(4) (5)
4.
With battery back-up.
5.
UC = unchanged.
UC
0
UC
0
UC
相關(guān)PDF資料
PDF描述
M41T82RQA6F 1 TIMER(S), REAL TIME CLOCK, QCC16
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