參數(shù)資料
型號(hào): M41T82RQA6F
廠商: STMICROELECTRONICS
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, QCC16
封裝: 4 X 4 MM, ROHS COMPLIANT, QFN-16
文件頁(yè)數(shù): 32/58頁(yè)
文件大?。?/td> 462K
代理商: M41T82RQA6F
Clock operation
M41T82 M41T83
3.8
8-bit (countdown) timer
The Timer Value Register is an 8-bit binary countdown timer. It is enabled and disabled via
the Timer Control Register (11h) TE bit. Other timer properties such as the source clock, or
interrupt generation are also selected in the Timer Control Register (see Table 9). For
accurate read back of the countdown value, the I2C-bus clock (SCL) must be operating at a
frequency of at least twice the selected timer clock.
The Timer Control register selects one of four source clock frequencies for the timer (4096,
64, 1, or 1/60 Hz), and enables/disables the timer. The timer counts down from a software-
loaded 8-bit binary value. At the end of every countdown, the timer sets the Timer Flag (TF)
bit. The TF bit can only be cleared by software. When asserted, the timer flag (TF) can also
be used to generate an interrupt (IRQ1/FT/OUT) on the M41T83. The interrupt may be
generated as a pulsed signal every countdown period or as a permanently active signal
which follows the condition of TF. The Timer Interrupt/Timer Pulse (TI/TP) bit is used to
control this mode selection. When reading the timer, the current countdown value is
returned.
3.8.1
Timer interrupt/timer pulse (TI/TP, M41T83 only)
TI/TP = 0
IRQ1/FT/OUT is active when TF is logic '1' (subject to the status of the Timer Interrupt
Enable bit (TIE).
TI/TP = 1
IRQ1/FT/OUT pulses are active when TF is logic '1' according to Table 10 (subject to
the status of the TIE bit).
Note:
If an Alarm condition, Watchdog time-out, Oscillator Failure, or OUT = 0 causes
IRQ1/FT/OUT to be asserted low, then IRQ1/FT/OUT will remain asserted even if TI/TP is
set to '1'. When in pulse mode (TI/TP = 1), clearing the TF bit will not stop the pulses on
IRQ1/FT/OUT. The output pulses will only stop if TE, TIE, or TI/TP are reset to '0'.
Table 9.
Timer control register map(1)
1.
Bit positions labeled with ‘0’ should always be written with logic '0.
'
Addr
D7
D6
D5
D4
D3
D2
D1
D0
Function
0Fh
WDF
AF1
AF2
BL
TF
OF
0
Flags
10h
Timer countdown value
Timer value
11h
TE
TI/TP
TIE
0
TD1
TD0
Timer control
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