參數(shù)資料
型號(hào)： M4-256/128-12AC
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： PLD
英文描述： High Performance E 2 CMOS In-System Programmable Logic
中文描述： EE PLD, 12 ns, PBGA256
封裝： BGA-256
文件頁(yè)數(shù)： 26/46頁(yè)
文件大?。?/td> 773K
代理商： M4-256/128-12AC
32
MACH 4 Family
MACH 4 TIMING PARAMETERS OVER OPERATING RANGES1
-7
-10
-12
-14
-15
-18
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Combinatorial Delay:
tPDi
Internal combinatorial propagation delay
5.5
8.0
10.0
12.0
13.0
16.0
ns
tPD
Combinatorial propagation delay
7.5
10.0
12.0
14.0
15.0
18.0
ns
Registered Delays:
tSS
Synchronous clock setup time, D-type register
5.5
6.0
7.0
10.0
12.0
ns
tSST
Synchronous clock setup time, T-type register
6.5
7.0
8.0
11.0
13.0
ns
tSA
Asynchronous clock setup time, D-type register
3.5
4.0
5.0
8.0
10.0
ns
tSAT
Asynchronous clock setup time, T-type register
4.5
5.0
6.0
9.0
11.0
ns
tHS
Synchronous clock hold time
0.0
ns
tHA
Asynchronous clock hold time
3.5
4.0
5.0
8.0
10.0
ns
tCOSi
Synchronous clock to internal output
3.5
4.5
6.0
8.0
10.0
ns
tCOS
Synchronous clock to output
5.5
6.5
8.0
10.0
12.0
ns
tCOAi
Asynchronous clock to internal output
7.5
10.0
12.0
16.0
18.0
ns
tCOA
Asynchronous clock to output
9.5
12.0
14.0
18.0
20.0
ns
Latched Delays:
tSSL
Synchronous Latch setup time
6.0
7.0
8.0
10.0
12.0
ns
tSAL
Asynchronous Latch setup time
4.0
5.0
8.0
10.0
ns
tHSL
Synchronous Latch hold time
0.0
ns
tHAL
Asynchronous Latch hold time
4.0
5.0
8.0
10.0
ns
tPDLi
Transparent latch to internal output
8.0
10.0
12.0
15.0
18.0
ns
tPDL
Propagation delay through transparent latch to output
10.0
12.0
14.0
17.0
20.0
ns
tGOSi
Synchronous Gate to internal output
4.0
5.5
8.0
9.0
10.0
ns
tGOS
Synchronous Gate to output
6.0
7.5
10.0
11.0
12.0
ns
tGOAi
Asynchronous Gate to internal output
9.0
11.0
14.0
17.0
20.0
ns
tGOA
Asynchronous Gate to output
11.0
13.0
16.0
19.0
22.0
ns
Input Register Delays:
tSIRS
Input register setup time
2.0
ns
tHIRS
Input register hold time
3.0
4.0
ns
tICOSi
Input register clock to internal feedback
3.5
4.5
6.0
ns
Input Latch Delays:
tSIL
Input latch setup time
2.0
ns
tHIL
Input latch hold time
3.0
4.0
ns
tIGOSi
Input latch gate to internal feedback
4.0
5.0
6.0
ns
tPDILi
Transparent input latch to internal feedback
2.0
ns
Input Register Delays with ZHT Option:
tSIRZ
Input register setup time - ZHT
6.0
ns
tHIRZ
Input register hold time - ZHT
0.0
ns
相關(guān)PDF資料
PDF描述
M4-256/128-12AI High Performance E 2 CMOS In-System Programmable Logic
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M4-256/128-18AI High Performance E 2 CMOS In-System Programmable Logic
M4-256/128-7AC High Performance E 2 CMOS In-System Programmable Logic
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M4258 WH002 功能描述:同軸電纜 30AWG 1C SHIELD 500ft SPOOL WHT RoHS:否 制造商:Murata RG 類型: 阻抗:50 Ohms 線規(guī) - 美國(guó)線規(guī)（AWG）: 導(dǎo)體材料: 絞合: 長(zhǎng)度:300 mm 外殼材料: 外徑: 屏蔽:
M4258 WH005 功能描述:同軸電纜 30AWG 1C SHIELD 100ft SPOOL WHT RoHS:否 制造商:Murata RG 類型: 阻抗:50 Ohms 線規(guī) - 美國(guó)線規(guī)（AWG）: 導(dǎo)體材料: 絞合: 長(zhǎng)度:300 mm 外殼材料: 外徑: 屏蔽:
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