
2-48
38C3 Group User’s Manual
APPLICATION
2.3 Serial I/O
Fig. 2.3.22 Relevant registers setting in master unit
Fig. 2.3.23 Relevant registers setting in slave unit
0
Synchronous clock output pin: SCLK1
SIOCON2
Serial I/O control register 1 (address 001916)
0 1 0 0 1
0 1 0
SIOCON1
Master unit
Synchronous clock : f(XIN)/32
SOUT, SCLK1, SCLK2 signal pin
SRDY output not used
LSB first
Internal clock
CMOS output
Serial I/O control register 2 (address 001A16)
0
SIOCON2
0 0
0 0 1
SIOCON1
Serial I/O control register 1 (address 001916)
Slave unit
SOUT, SCLK1, SCLK2 signal pin
SRDY output not used
LSB first
Synchronous clock: External clock
CMOS output
Synchronous clock input pin: SCLK1
Serial I/O control register 2 (address 001A16)