
3886 Group User’s Manual
APPENDIX
3-5
3.1 Electrical characteristics
Table 3.1.5 Electrical characteristics (1)
(VCC = 2.7 to 5.5 V, VCC = 4.0 to 5.5 V for flash memory version, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
3.1.3 Electrical characteristics
“H” output voltage
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P80–P87 (Note)
“L” output voltage
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
Hysteresis
CNTR0, CNTR1, INT0, INT1
INT20–INT40, INT21–INT41
P30–P37
Hysteresis
RxD, SCLK1, SIN2, SCLK2
Hysteresis
RESET
“H” input current
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
“H” input current
RESET, CNVSS
“H” input current
XIN
“L” input current
P00–P07, P10–P17, P20–P27
P30–P37, P40–P47, P50–P57
P60–P67, P70–P77, P80–P87
“L” input current
RESET,CNVSS
“L” input current
XIN
“L” input current
P30–P37 (at Pull-up)
RAM hold voltage
Limits
V
A
V
Parameter
Min.
Typ.
Max.
Symbol
Unit
Note: P00–P03 are measured when the P00–P03 output structure selection bit of the port control register 1 (bit 0 of address 002E16) is “0”.
P04–P07 are measured when the P04–P07 output structure selection bit of the port control register 1 (bit 1 of address 002E16) is “0”.
P10–P13 are measured when the P10–P13 output structure selection bit of the port control register 1 (bit 2 of address 002E16) is “0”.
P14–P17 are measured when the P14–P17 output structure selection bit of the port control register 1 (bit 3 of address 002E16) is “0”.
P42, P43, P44, and P46 are measured when the P4 output structure selection bit of the port control register 2 (bit 2 of address 002F16) is “0”.
P45 is measured when the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
IOH = –10 mA
VCC = 4.0 to 5.5 V
IOH = –1.0 mA
VCC = 2.7 to 5.5 V
IOL = 10 mA
VCC = 4.0 to 5.5 V
IOL = 1.6 mA
VCC = 2.7 to 5.5 V
VI = VCC
(Pin floating. Pull-up
transistors “off”)
VI = VCC
VI = VSS
(Pin floating. Pull-up
transistors “off”)
VI = VSS
VCC = 4.0 to 5.5 V
VI = VSS
VCC = 2.7 to 5.5 V
When clock stopped
VCC–2.0
VCC–1.0
–20
–10
2.0
Test conditions
0.4
0.5
4
–4
–60
2.0
0.4
5.0
–5.0
–120
5.5
VOH
VOL
VT+–VT–
IIH
IIL
VRAM