參數(shù)資料
型號(hào)： M38859M4-XXXHP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 87/103頁
文件大?。?/td> 1580K
代理商： M38859M4-XXXHP
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
86
Functions To Inhibit Rewriting Flash Memory
To prevent the contents of the flash memory data from being read
out or rewritten easily, the device incorporates a ROM code protect
function for use in parallel I/O mode.
ROM code protect function
The ROM code protect function is the function inhibit reading out or
modifying the contents of the flash memory version by using the
ROM code protect control address (FFDB
16
) during parallel I/O
mode. Figure 82 shows the ROM code protect control address
(FFDB
16
). (This address exists in the user ROM area.)
If one of the pair of ROM code protect bits is set to
“
0
”
, ROM code
protect is turned on, so that the contents of the flash memory data
are protected against readout and reprogram. ROM code protect is
implemented in two levels. If level 2 is selected, the flash memory is
protected even against readout by a manufactures inspection test
also. When an attempt is made to select both level 1 and level 2,
level 2 is selected by default.
If both of the two ROM code protect reset bits are set to
“
00
”
, ROM
code protect is turned off, so that the contents of the flash memory
data can be read out or reprogram. Once ROM code protect is
turned on, the contents of the ROM code protect reset bits cannot
be modified in parallel I/O mode. Use CPU reprogram mode to re-
program the contents of the ROM code protect reset bits.
Fig. 82 ROM code protect control address
ROM code protect control (address FFDB
16
) (
Note 1
)
ROMCP
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7
Notes 1
: The contents of ROM code protect control register are
“
FF
16
”
just after reset
release. This area is on the ROM in the mask ROM version.
2
: When ROM code protect is turned on, the internal flash memory is protected
against readout or modification in parallel I/O mode.
3
: When ROM code protect level 2 is turned on, ROM code readout by a shipment
inspection LSI tester, etc. also is inhibited.
4
: The ROM code protect reset bits can be used to turn off ROM code protect level 1
and ROM code protect level 2. However, since these bits cannot be modified in
parallel I/O mode, they need to be rewritten in standard serial I/O mode or CPU
rewrite mode.
1
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