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3850 Group (Spec. H) User’s Manual
APPLICATION
2.11 Flash memory mode
2.11.6 CPU rewrite mode
In the CPU rewrite mode, issuing software commands through the Central Processing Unit (CPU) can
rewrite the built-in flash memory. Accordingly, the contents of the built-in flash memory can be rewritten
with the microcomputer itself mounted on board, without using the programmer.
Store the rewrite control program to the built-in flash memory in advance. The built-in flash memory cannot
be read in the CPU rewrite mode. Accordingly, after transferring the rewrite control program to the internal
RAM, execute it on the RAM.
The following commands can be used in the CPU rewrite mode: read array, read status register, clear
status register, program, erase all block, and block erase. For details concerning each command, refer to
“CHAPTER 1 Flash memory mode (CPU rewrite mode)”.
(1)
CPU rewrite mode beginning/release procedures
Operation procedure in the CPU rewrite mode for the built-in flash memory is described below.
As for the control example, refer to “2.11.7 (2) Control example in the CPU rewrite mode”.
[Beginning procedure]
Apply 5 V±10 % to the CNVSS/VPP pin (at selecting boot ROM area).
Release reset.
Set bits 6 and 7 (main clock division ratio selection bits) of the CPU mode register.
After CPU rewrite mode control program is transferred to internal RAM, jump to this control
program on RAM. (The following operations are controlled by this control program).
Apply 5 V±10 % to the CNVSS/VPP pin (in single-chip mode).
Set “1” to the CPU rewrite mode select bit (bit 1 of address 0FFE16).
For this bit to be set to “1”, the user needs to write “0” and then “1” to it in succession.
Read the CPU rewrite mode entry flag (bit 2 of address 0FFE16) to confirm that the CPU rewrite
mode is set to “1”.
Flash memory operations are executed by using software commands.
Note: The following procedures are also necessary.
Control for data which is input from the external (serial I/O etc.) and to be programmed
to the flash memory.
Initial setting for ports, etc.
Writing to the watchdog timer
[Release procedure]
Execute the read command or set the flash memory reset bit (bit 3 of address 0FFE16).
Set the CPU rewrite mode select bit (bit 0 of address 0FFE16) to “0”.