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參數(shù)資料
| 型號： | M38504M6A-XXXSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 6.25 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 13 X 36.72 MM, 1.78 MM PITCH, PLASTIC, SDIP-42 |
| 文件頁數(shù)： | 87/90頁 |
| 文件大?。?/td> | 899K |
| 代理商： | M38504M6A-XXXSP |
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3850 Group (Spec.A)
Rev.2.10
2005.11.14
page 86 of 86
REJ03B0093-0210
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Notes on restarting oscillation
Restarting oscillation
Usually, when the MCU stops the clock oscillation by STP instruc-
tion and the STP instruction has been released by an external
interrupt source, the fixed values of Timer 1 and Prescaler 12
(Timer 1 = “0116”, Prescaler 12 = “FF16”) are automatically re-
loaded in order for the oscillation to stabilize. The user can inhibit
the automatic setting by writing “1” to bit 0 of MISRG (address
003816).
However, by setting this bit to “1”, the previous values, set just be-
fore the STP instruction was executed, will remain in Timer 1 and
Prescaler 12. Therefore, you will need to set an appropriate value
to each register, in accordance with the oscillation stabilizing time,
before executing the STP instruction.
<Reason>
Oscillation will restart when an external interrupt is received. How-
ever, internal clock
φ is supplied to the CPU only when Timer 1
starts to underflow. This ensures time for the clock oscillation us-
ing the ceramic resonators to be stabilized.
Flash Memory Version
Connect the CNVSS/VPP pin the shortest possible to the GND pat-
tern which is supplied to the Vss pin of the microcomputer. In
addition connecting an approximately 1 k to 5 k
resistor in series
to the GND could improve noise immunity. In this case as well as
the above mention, connect the pin the shortest possible to the
GND pattern which is supplied to the Vss pin of the microcom-
puter.
qReason
The CNVSS/VPP pin is the power source input pin for the built-in
flash memory. When programming in the flash memory, the im-
pedance of the VPP pin is low to allow the electric current for
writing to flow into the built-in flash memory. Because of this, noise
can enter easily. If noise enters the VPP pin, abnormal instruction
codes or data are read from the flash memory, which may cause a
program runaway.
Handling of Source Pins
In order to avoid a latch-up occurrence, connect a capacitor suit-
able for high frequencies as bypass capacitor between power
source pin (VCC pin) and GND pin (VSS pin) and between power
source pin (VCC pin) and analog power source input pin (AVSS
pin). Besides, connect the capacitor to as close as possible. For
bypass capacitor which should not be located too far from the pins
to be connected, a ceramic capacitor of 0.01
F–0.1 F is recom-
mended.
Differences among 3850 group (standard),
3850 group (spec. H), and 3850 group (spec. A)
(1) The absolute maximum ratings of 3850 group (spec. H/A) is
smaller than that of 3850 group (standard).
Power source voltage Vcc = 0.3 to 6.5 V
CNVss input voltage VI = –0.3 to Vcc +0.3 V
(2) The oscillation circuit constants of XIN-XOUT, XCIN-XCOUT may
be some differences between 3850 group (standard) and 3850
group (spec. H).
(3) Do not write any data to the reserved area and the reserved
bit. (Do not change the contents after reset.)
(4) Fix bit 3 of the CPU mode register to “1”.
(5) Be sure to perform the termination of unused pins.
CNVSS/(VPP)
VSS
The shortest
Approx. 5k
(Note)
Note. Shows the microcomputer's pin.
Fig. 7 Wiring for the CNVSS/VPP pin
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