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參數(shù)資料
| 型號： | M383L6420ETS |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | DDR SDRAM Registered Module |
| 中文描述： | DDR SDRAM的注冊模塊 |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 448K |
| 代理商： | M383L6420ETS |
DDR SDRAM
256MB, 512MB, 1GB Registered DIMM
Revision 1.4 February, 2004
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of V
IX
is expected to equal 0.5*V
DDQ
of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Output Load Circuit (SSTL_2)
Output
Z0=50
C
LOAD
=30pF
=0.5*V
DDQ
R
T
=50
V
tt
=0.5*V
DDQ
Input/Output Capacitance
(VDD=2.5V, VDDQ=2.5V, TA= 25
°
C, f=1MHz)
Parameter
Symbol
M383(12)L3223ETS, M383(12)L6420ETS
Unit
Min
9
9
9
11
10
10
10
Max
11
11
11
12
11
11
11
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0)
Input capacitance( CS0)
Input capacitance( CLK0, CLK0 )
Input capacitance(DM0~DM8)
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
CIN1
CIN2
CIN3
CIN4
CIN5
Cout1
Cout2
pF
pF
pF
pF
pF
pF
pF
Parameter
Symbol
M383(12)L6423ETS, M383(12)L2828ET1(0)
Min
9
9
9
11
14
14
14
Unit
Max
11
11
11
12
16
16
16
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0,CKE1)
Input capacitance( CS0, CS1)
Input capacitance( CLK0, CLK0 )
Input capacitance(DM0~DM8)
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
CIN1
CIN2
CIN3
CIN4
CIN5
Cout1
Cout2
pF
pF
pF
pF
pF
pF
pF
AC Operating Conditions
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
VREF + 0.31
V
V
V
V
3
3
1
2
VREF - 0.31
VDDQ+0.6
0.5*VDDQ+0.2
0.7
0.5*VDDQ-0.2
V
REF
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