參數(shù)資料
型號: M38220MBFS
廠商: Mitsubishi Electric Corporation
英文描述: 3-state hex inverting buffer - Description: Hex Inverting Buffer (3-State) ; Logic switching levels: CMOS ; Number of pins: 16 ; Output drive capability: -10/+20 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 25@15V ns; Voltage: 5 Volts +
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 16/78頁
文件大小: 998K
代理商: M38220MBFS
23
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
MITSUBISHI MICROCOMPUTERS
Fig. 18 Interrupt control
Fig. 19 Structure of interrupt-related registers
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
b7
b0
Interrupt edge selection register
INT0 interrupt edge selection bit
INT1 interrupt edge selection bit
INT2 interrupt edge selection bit
INT3 interrupt edge selection bit
Not used (return “0” when read)
(INTEDGE : address 003A16)
Interrupt request register 1
INT0 interrupt request bit
INT1 interrupt request bit
Serial I/O receive interrupt request bit
Serial I/O transmit interrupt request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Interrupt control register 1
INT0 interrupt enable bit
INT1 interrupt enable bit
Serial I/O receive interrupt enable bit
Serial I/O transmit interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ1 : address 003C16)
(ICON1 : address 003E16)
Interrupt request register 2
CNTR0 interrupt request bit
CNTR1 interrupt request bit
Timer 1 interrupt request bit
INT2 interrupt request bit
INT3 interrupt request bit
Key input interrupt request bit
ADT/AD conversion interrupt request bit
Not used (returns “0” when read)
(IREQ2 : address 003D16)
Interrupt control register 2
CNTR0 interrupt enable bit
CNTR1 interrupt enable bit
Timer 1 interrupt enable bit
INT2 interrupt enable bit
INT3 interrupt enable bit
Key input interrupt enable bit
ADT/AD conversion interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit.)
0 : Interrupts disabled
1 : Interrupts enabled
(ICON2 : address 003F16)
0 : Falling edge active
1 : Rising edge active
b7
b0
b7
b0
b7
b0
b7
b0
相關(guān)PDF資料
PDF描述
M38220MBHP Hex inverting Schmitt trigger - Description: Hex Inverting Schmitt-Trigger ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 30@15V ns; Voltage: 4.5-15.5 V
M38220MBHXXXGP Hex inverting Schmitt trigger - Description: Hex Inverting Schmitt-Trigger ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 30@15V ns; Voltage: 4.5-15.5 V
M38220MBHXXXHP Hex inverting Schmitt trigger - Description: Hex Inverting Schmitt-Trigger ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 30@15V ns; Voltage: 4.5-15.5 V
M38220MBMXXXFS Quadruple 2-input NAND gate - Description: Quad 2-Input NAND Gate ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 20@15V ns; Voltage: 4.5-15.5 V
M38220MBMXXXGP Quadruple 2-input NAND gate - Description: Quad 2-Input NAND Gate ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 20@15V ns; Voltage: 4.5-15.5 V
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參數(shù)描述
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