參數(shù)資料
型號： M38207E8HP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 62/66頁
文件大小： 1093K
代理商： M38207E8HP
62
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
t
w(RESET)
t
c(X
IN
)
t
wH(X
IN
)
t
wL(X
IN
)
t
c(CNTR)
t
wH(CNTR)
t
wL(CNTR)
t
wH(INT)
t
wL(INT)
t
c(S
CLK1
)
t
wH(S
CLK1
)
t
wL(S
CLK1
)
t
su(R
X
D–S
CLK1
)
t
h(S
CLK1
–R
X
D)
t
c(S
CLK2
)
t
wH(S
CLK2
)
t
wL(S
CLK2
)
t
su(S
IN2
–S
CLK2
)
t
h(S
CLK2
–S
IN2
)
Note:
When f(X
IN
) = 8 MHz and bit 6 of address 001A
16
is “1” (clock synchronous).
Divide this value by four when f(X
IN
) = 8 MHz and bit 6 of address 001A
16
is “0” (UART).
Reset input “L” pulse width
Main clock input cycle time (X
IN
input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
to INT
3
input “H” pulse width
INT
0
to INT
3
input “L” pulse width
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input set up time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 input set up time
Serial I/O2 input hold time
Symbol
Parameter
Limits
Typ.
Min.
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
(V
CC
= 4.0 to 5.5 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted.)
TIMING REQUIREMENTS 1 (Low Power Source Voltage Version)
2
125
45
40
250
105
105
80
80
800
370
370
220
100
1000
400
400
200
200
Max.
Reset input “L” pulse width
Main clock iuput cycle time (X
IN
input)
Main clock input “H” pulse width
Main clock input “L” pulse width
CNTR
0
, CNTR
1
input cycle time
CNTR
0
, CNTR
1
input “H” pulse width
CNTR
0
, CNTR
1
input “L” pulse width
INT
0
to INT
3
input “H” pulse width
INT
0
to INT
3
input “L” pulse width
Serial I/O1 clock input cycle time (Note)
Serial I/O1 clock input “H” pulse width (Note)
Serial I/O1 clock input “L” pulse width (Note)
Serial I/O1 input set up time
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 input set up time
Serial I/O2 input hold time
t
w(RESET)
t
c(X
IN
)
t
wH(X
IN
)
t
wL(X
IN
)
t
c(CNTR)
t
wH(CNTR)
t
wL(CNTR)
t
wH(INT)
t
wL(INT)
t
c(S
CLK1
)
t
wH(S
CLK1
)
t
wL(S
CLK1
)
t
su(R
X
D–S
CLK1
)
t
h(S
CLK1
–R
X
D)
t
c(S
CLK2
)
t
wH(S
CLK2
)
t
wL(S
CLK2
)
t
su(S
IN2
–S
CLK2
)
t
h(S
CLK2
–S
IN2
)
Symbol
Parameter
Limits
Typ.
Min.
2
125
45
40
900/
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
(V
CC
= 2.5 to 4.0 V, V
SS =
0 V, T
a
= –20 to 85
°
C, unless otherwise noted.)
(V
CC
–0.4)
450/
(V
CC
–0.4)–20
450/
(V
CC
–0.4)–20
230
230
2000
950
950
400
200
2000
950
950
400
300
Max.
Note:
When f(X
IN
) = 2 MHz and bit 6 of address 001A
16
is “1” (clock synchronous).
Divide this value by four when f(X
IN
) = 2 MHz and bit 6 of address 001A
16
is “0” (UART).
TIMING REQUIREMENTS 2 (Low Power Source Voltage Version)
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