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參數(shù)資料
| 型號： | M38203E4-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.50 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 24/67頁 |
| 文件大?。?/td> | 1099K |
| 代理商： | M38203E4-XXXHP |
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29
MITSUBISHI MICROCOMPUTERS
3820 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
SERIAL I/O2
The serial I/O2 function can be used only for clock synchronous
serial I/O.
For clock synchronous serial I/O2 the transmitter and the receiver
must use the same clock. If the internal clock is used, transfer is
started by a write signal to the serial I/O2 register.
Serial I/O2 Control Register (SIO2CON) 001D16
The serial I/O2 control register contains 7 bits which control vari-
ous serial I/O functions.
Fig. 20 Structure of serial I/O2 control register
Fig. 21 Block diagram of serial I/O2 function
Serial I/O2 control register
(SIO2CON : address 001D16)
b7
Internal synchronization clock select bits
0 0 0: f(XIN)/8
0 0 1: f(XIN)/16
0 1 0: f(XIN)/32
0 1 1: f(XIN)/64
1 0 0:
1 0 1:
1 1 0: f(XIN)/128
1 1 1: f(XIN)/256
Serial I/O2 port selection bit
0: I/O port
1: SOUT2,SCLK2 signal output
SRDY2 output enable bit
0: I/O port
1: SRDY2 signal output
Transfer direction selection bit
0: LSB first
1: MSB first
Synchronization clock selection bit
0: External clock
1: Internal clock
Not used (returns “0” when read)
b0
b2 b1 b0
Do not set
XIN
"1"
"0"
"1"
"0"
"1"
SRDY2
S
CLK2
"0"
"1"
1/8
1/16
1/32
1/64
1/128
1/256
Data bus
Serial I/O2
interrupt request
Serial I/O2 port selection bit
Serial I/O counter 2 (3)
Serial I/O shift register 2 (8)
Synchronization circuit
Serial I/O2 port selection bit
Synchronization clock
selection bit
SRDY2 output enable bit
External clock
Internal synchronization
clock select bits
Divider
P53 latch
P53/SRDY2
P52/SCLK2
P51/SOUT2
P50/SIN2
P52 latch
P51 latch
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