參數(shù)資料
型號： M38037MCL-XXXKP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機
文件頁數(shù)： 96/119頁
文件大小： 1575K
代理商： M38037MCL-XXXKP
Rev.1.00
REJ03B0212-0100
Apr 2, 2007
Page 96 of 117
3803 Group (Spec.L)
Notes on Interrupts
1. Change of relevant register settings
When the setting of the following registers or bits is changed, the
interrupt request bit may be set to “1”. When not requiring the
interrupt occurrence synchronized with these setting, take the
following sequence.
Interrupt edge selection register (address 003A
16
)
Timer XY mode register (address 0023
16
)
Timer Z mode register (address 002A
16
)
Set the above listed registers or bits as the following sequence.
Fig 95. Sequence of changing relevant register
<Reason>
When setting the followings, the interrupt request bit may be set
to “1”.
When setting external interrupt active edge
Concerned register: Interrupt edge selection register
(address 003A
16
)
Timer XY mode register (address 0023
16
)
Timer Z mode register (address 002A
16
)
When switching interrupt sources of an interrupt vector
address where two or more interrupt sources are allocated.
Concerned register: Interrupt source selection register
(address 0039
16
)
2. Check of interrupt request bit
When executing the BBC or BBS instruction to an interrupt
request bit of an interrupt request register immediately after this
bit is set to “0”, execute one or more instructions before
executing the BBC or BBS instruction.
Fig 96. Sequence of check of interrupt request bit
<Reason>
If the BBC or BBS instruction is executed immediately after an
interrupt request bit of an interrupt request register is cleared to
“0”, the value of the interrupt request bit before being cleared to
“0” is read.
Set the interrupt edge select bit (active edge switch bit)
or the interrupt (source) select bit to “1”.
NOP
(one or more instructions)
Set the corresponding interrupt enable bit to “0” (disabled).
Set the corresponding interrupt request bit to “0”
(no interrupt request issued).
Set the corresponding interrupt enable bit to “1” (enabled).
NOP
(one or more instructions)
Clear the interrupt request bit to “0” (no interrupt issued)
Execute the
BBC
or
BBS
instruction
相關(guān)PDF資料
PDF描述
M38037MF-XXXKP Programmable Skew Clock Buffer; Voltage (V): 5.0 V; Operating Frequency: 3.75 MHz to 100 MHz; Outputs: 8; Operating Range: 0 to 70 C
M38037MF-XXXSP High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
M38037MF-XXXWG High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
M38038F1L-XXXHP High Speed Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 110 MHz; Outputs: 8; Operating Range: 0 to 70 C
M38038F1L-XXXKP Low Voltage Programmable Skew Clock Buffer; Voltage (V): 3.3 V; Operating Frequency: 3.75 MHz to 80 MHz; Outputs: 8; Operating Range: 0 to 70 C
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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