參數(shù)資料
型號(hào)： M37905M8C-XXXSP
廠商： Mitsubishi Electric Corporation
英文描述： DIODE SCHOTTKY DUAL COMMON-CATHODE 25V 200mW 0.32V-vf 200mA-IFM 1mA-IF 2uA-IR SOT-23 3K/REEL
中文描述： 16位CMOS微機(jī)
文件頁(yè)數(shù)： 35/102頁(yè)
文件大?。?/td> 881K
代理商： M37905M8C-XXXSP
35
M37905M4C-XXXFP, M37905M4C-XXXSP
M37905M6C-XXXFP, M37905M6C-XXXSP
M37905M8C-XXXFP, M37905M8C-XXXSP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
TIMER B
Figure 35 shows a block diagram of timer B.
Timer B has three modes: timer mode, event counter mode, and
pulse period measurement/pulse width measurement mode. The
mode is selected with bits 0 and 1 of the timer Bi mode register (i=0
to 2). Each of these modes is described below.
(1) Timer mode [00]
Figure 36 shows the bit configuration of the timer Bi mode register in
the timer mode. Bits 0 and 1 of the timer Bi mode register must al-
ways be “0” in timer mode.
Bits 6 and 7 are used to select the clock source. The counting of the
selected clock starts when the count start bit is “1” and stops when
“0”.
As shown in Figure 21, the timer Bi’s count start bits are allocated at
the same address to which some of the timer Ai’s count start bits are
allocated. (In other words, they are allocated in the count start regis-
ter 0.) The count is decremented, an interrupt occurs, and the inter-
rupt request bit in the timer Bi interrupt control register is set when
the contents becomes 0000
16
. At the same time, the contents of the
reload register is stored in the counter and count is continued.
Timer Bi does not have a pulse output function or a gate function like
timer A.
When data is written to timer Bi halted, it is written to the reload reg-
ister and the counter. When data is written to timer Bi which is busy,
the data is written to the reload register, but not to the counter. The
new data is reloaded from the reload register to the counter at the
next reload time and counting continues.
The contents of the counter can be read at any time.
Fig. 35 Block diagram of timer B
Data bus (odd)
Data bus (even)
Reload register (16)
Counter (16)
Count start register 0
Event counter
mode
Notes 1:
Perform a write and read to/from timer Bi register in the condition of 16-bit data length : data length flag (m) = “0”.
2:
Only for timer B2, a count source in the event counter mode can be selected.
(Address 40
16
)
Counter reset
circuit
Timer mode
Pulse period measurement/Pulse
width measurement mode
(Low-order 8 bits)
(High-order 8 bits)
f
2
f
16
f
64
f
512
Count source select bits
f
x
32
Polarity selection
and edge pulse
generator
TBi
IN
Timer B2 clock source
select bit
(Note 2)
Timer B2 clock source select bit : Bit 6 at address 63
16
Addresses
Timer B0 51
16
50
16
Timer B1 53
16
52
16
Timer B2 55
16
54
16
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