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ELECTRICAL CHARACTERISTICS
7702/7703 Group User’s Manual
15–17
15.8 Memory expansion mode and microprocessor mode : with no Wait
Timing requirements (VCC = 5 V±10%, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
15.8 Memory expansion mode and microprocessor mode : with no Wait
Limits
25 MHz
16 MHz
Unit
Parameter
Symbol
8
ns
tc
tw(H)
tw(L)
tr
tf
tsu(P1D–E)
tsu(P2D–E)
tsu(P4D–E)
tsu(P5D–E)
tsu(P6D–E)
tsu(P7D–E)
tsu(P8D–E)
th(E–P1D)
th(E–P2D)
th(E–P4D)
th(E–P5D)
th(E–P6D)
th(E–P7D)
th(E–P8D)
External clock input cycle time
External clock input high-level pulse width
External clock input low-level pulse width
External clock rise time
External clock fall time
Port P1 input setup time
Port P2 input setup time
Port P4 input setup time
Port P5 input setup time
Port P6 input setup time
Port P7 input setup time
Port P8 input setup time
Port P1 input hold time
Port P2 input hold time
Port P4 input hold time
Port P5 input hold time
Port P6 input hold time
Port P7 input hold time
Port P8 input hold time
Max.
Min.
40
15
30
60
0
10
62
25
45
100
0
Switching characteristics (VCC = 5 V±10%, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Limits
25 MHz
16 MHz
Unit
Parameter
Symbol
Max.
Min.
Port P4 data output delay time
Port P5 data output delay time
Port P6 data output delay time
Port P7 data output delay time
Port P8 data output delay time
φ1 output delay time
_
E low-level pulse width
Port P0 address output delay time
Port P1 data output delay time (BYTE = “L”)
Port P1 floating start delay time (BYTE = “L”)
Port P1 address output delay time
Port P2 data output delay time
Port P2 floating start delay time
Port P2 address output delay time
ALE output delay time
ALE pulse width
BHE output delay time
R/W
output delay time
td(E–P4Q)
td(E–P5Q)
td(E–P6Q)
td(E–P7Q)
td(E–P8Q)
td(E–φ
1
)
tw(EL)
td(P0A–E)
td(E–P1Q)
tpxz(E–P1Z)
td(P1A–E)
td(P1A–ALE)
th(E–P2Q)
tpxz(E–P2Z)
td(P2A–E)
th(P2A–ALE)
td(ALE–E)
tw(ALE)
td(BHE–E)
td(R/W–E)
ns
Note: For test conditions, refer to Figure 15.10.1.
V This is the value depending on f(XIN). For data formula, refer to Table 15.8.1.
0
50
12
5
12
5
4
22
20
V
100
20
70
5
70
5
0
95
30
24
30
24
4
35
30
V
80
18
45
5
45
5