參數(shù)資料
型號: M37548G1FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO20
封裝: 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20
文件頁數(shù): 43/84頁
文件大小: 1427K
代理商: M37548G1FP
Rev.2.02
Mar 31, 2009
Page 48 of 81
REJ03B0210-0202
7548 Group
Oscillation Control
Clock mode register
Clock mode register contains the oscillation control bits of each
oscillation circuits, clock selection bits and etc
Clock selection bits
φSOURCE can be selected by the clock selection bits (bits 5 and
4 in clock mode register).
φSOURCE can be selected from low-
speed on-chip oscillator, high-speed on-chip oscillator, XIN/XCIN
oscillation or external clock input by the clock selection bits.
φSOURCE is also used to the clock for peripheral functions.
When the oscillation method selection bits (bits 1 and 0 in
FSROM1) is set to “002” (oscillation pins not used), setting the
clock selection bits to “102” (XIN/XCIN oscillation, external
clock input) is disabled.
Clock division ratio selection bit
The internal clock
φ is generated by dividing φSOURCE.
Select the division ratio using the clock division ration selection
bits (bits 7 and 6 in CLKM).
The division ratio can be selected from among
φSOURCE/8
(low-speed mode), /4 (middle-speed mode), /2 (high-speed
mode), and no division (double-speed mode).
Table 9 shows the division ratio (mode) settings.
When releasing reset, the low-speed on-chip oscillator is selected
as
φSOURCE, and φSOURCE/8 is selected as the internal clock.
The high-speed on-chip oscillator is stopped at this time. If an
oscillation circuit is connected to the clock pin, oscillation starts.
To switch
φSOURCE to XIN/XCIN oscillation, generate wait time
using the on-chip oscillator until the oscillation is stabilized.
: can be “0” or “1”, no change in outcome
Table 9
Setting the clock division (mode)
φSOURCE
CLKM
FSROM1
FSROM2
Clock division
ratio selection
bits
Clock
selection bits
XIN/XCIN
oscillation
control bit
High-speed on-chip
oscillator oscillation
control bit
Low-speed on-chip
oscillator oscillation
control bit
Oscillation
method
selection bits
Low-speed on-
chip oscillator
control bit
Bit 7, 6
Bit 5, 4
Bit 2
Bit 1
Bit 0
Bit 1, 0
Bit 4
XIN
Double-speed
11
10
0
01
High-speed
10
0
01
Middle-speed
01
10
0
01
Low-speed
00
10
0
01
XCIN
Double-speed
11
10
0
10
High-speed
10
0
10
Middle-speed
01
10
0
10
Low-speed
00
10
0
10
External
clock
Double-speed
11
10
11
High-speed
10
11
Middle-speed
01
10
11
Low-speed
00
10
11
High-speed
on-chip
oscillator
Double-speed
11
01
0
High-speed
10
01
0
Middle-speed
01
0
Low-speed
00
01
0
Low-speed
on-chip
oscillator
Double-speed
11
00
0
1/0
High-speed
10
00
0
1/0
Middle-speed
01
00
0
1/0
Low-speed
00
0
1/0
bit
Mode
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