![](http://datasheet.mmic.net.cn/30000/M37531E4V-XXXGP_datasheet_2359826/M37531E4V-XXXGP_188.png)
8
8-7
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
32182 Group User’s Manual (Rev.1.0)
8.3.1 Port Data Registers
P0 Data Register (P0DATA)
<Address: H’0080 0700>
P1 Data Register (P1DATA)
<Address: H’0080 0701>
P2 Data Register (P2DATA)
<Address: H’0080 0702>
P3 Data Register (P3DATA)
<Address: H’0080 0703>
P4 Data Register (P4DATA)
<Address: H’0080 0704>
P6 Data Register (P6DATA)
<Address: H’0080 0706>
P7 Data Register (P7DATA)
<Address: H’0080 0707>
P8 Data Register (P8DATA)
<Address: H’0080 0708>
P9 Data Register (P9DATA)
<Address: H’0080 0709>
P10 Data Register (P10DATA)
<Address: H’0080 070A>
P11 Data Register (P11DATA)
<Address: H’0080 070B>
P12 Data Register (P12DATA)
<Address: H’0080 070C>
P13 Data Register (P13DATA)
<Address: H’0080 070D>
P14 Data Register (P14DATA)
<Address: H’0080 070E>
P15 Data Register (P15DATA)
<Address: H’0080 070F>
P16 Data Register (P16DATA)
<Address: H’0080 0710>
P17 Data Register (P17DATA)
<Address: H’0080 0711>
P18 Data Register (P18DATA)
<Address: H’0080 0712>
P19 Data Register (P19DATA)
<Address: H’0080 0713>
P20 Data Register (P20DATA)
<Address: H’0080 0714>
P21 Data Register (P21DATA)
<Address: H’0080 0715>
P22 Data Register (P22DATA)
<Address: H’0080 0716>
9
10
11
12
13
14
b15)
(b8
123456
b7
b0
Pn0DT Pn1DT
Pn2DT Pn3DT
Pn4DT Pn5DT Pn6DT
Pn7DT
????????
n = 0–22 (not including P5)
<After reset: Undefined>
b
Bit Name
Function
R
W
0(b8)
Pn0DT (Port Pn0 data bit)
<At read>
R
W
1(b9)
Pn1DT (Port Pn1 data bit)
Depends on how the Port Direction Register is set
2(b10)
Pn2DT (Port Pn2 data bit)
If direction bit = "0" (input mode)
3(b11)
Pn3DT (Port Pn3 data bit)
0: Port input pin = "low"
4(b12)
Pn4DT (Port Pn4 data bit)
1: Port input pin = "high"
5(b13)
Pn5DT (Port Pn5 data bit)
If direction bit = "1" (output mode) (Note 1)
6(b14)
Pn6DT (Port Pn6 data bit)
0: Port output latch = "0" / Port pin level = "low"
7(b15)
Pn7DT (Port Pn7 data bit)
1: Port output latch = "1" / Port pin level = "high"
<At write>
Write to the port output latch
Note 1: To select the port data to read, use the Port Input Special Function Control Register’s port input data select bit (PISEL).
Notes: No data bits are provided for the following ports (read as "0", writing has no effect):
P40, P60, P90–P92, P120–P123, P170, P171, P204–P207
The SBI# pin level can be read out by reading the P64DT bit. Writing to the P64DT bit has no effect.
The MOD0 and MOD1 pin levels can be read out by reading the P80DT and P81DT bits, respectively. Writing to the P80DT
and P81DT bits has no effect.
P221 is input-only port. Writing to the P221DT bit has no effect.
Although no pins are available for P65–P67, P140–P147, P151, P152, P154–P157, P160–P167, P172, P173, P176, P177,
P180–P187, P190–P197, P200–P203, P210–P217, P222, P226 and P227, because internal circuits are included, make
sure the ports are set for low-level output when initialized (to prevent current from flowing in through the port).
Alhough no pins are available for P223, it is internally pulled high (read as "0", writing has no effect).
8.3 Input/Output Port Related Registers