參數(shù)資料
型號： M37281EKSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-52
文件頁數(shù)： 109/172頁
文件大小： 1319K
代理商： M37281EKSP
Rev.1.01
2003.07.16
page 41 of 170
M37281MAH–XXXSP,M37281MFH–XXXSP,M37281MKH–XXXSP, M37281EKSP
8.6.6 START Condition Generation Method
When the ESO bit of the I2C control register (address 00F916) is “1,”
execute a write instruction to the I2C status register (address 00F816)
to set the MST, TRX and BB bits to “1.” A START condition will then
be generated. After that, the bit counter becomes “0002” and an SCL
for 1 byte is output. The START condition generation timing and BB
bit set timing are different in the standard clock mode and the high-
speed clock mode. Refer to Figure 8.6.9 for the START condition
generation timing diagram, and Table 8.6.2 for the START condition/
STOP condition generation timing table.
Fig. 8.6.9 START Condition Generation Timing Diagram
I2C status register
write signal
Set time for
BB flag
Hold time
Setup
time
SCL
SDA
BB flag
Setup
time
8.6.7 STOP Condition Generation Method
When the ESO bit of the I2C control register (address 00F916) is “1,”
execute a write instruction to the I2C status register (address 00F816)
for setting the MST bit and the TRX bit to “1” and the BB bit to “0”. A
STOP condition will then be generated. The STOP condition genera-
tion timing and the BB flag reset timing are different in the standard
clock mode and the high-speed clock mode. Refer to Figure 8.6.10
for the STOP condition generation timing diagram, and Table 8.6.2
for the START condition/STOP condition generation timing table.
Fig. 8.6.10 STOP Condition Generation Timing Diagram
Table 8.6.2 START Condition/STOP Condition Generation Tim-
ing Table
Item
Setup time
Hold time
Set/reset time
for BB flag
Standard Clock Mode
4.25
s (17 cycles)
5.0
s (20 cycles)
3.0
s (12 cycles)
High-speed Clock Mode
1.75
s (7 cycles)
2.5
s (10 cycles)
1.5
s (6 cycles)
Note: Absolute time at
φ = 4 MHz. The value in parentheses denotes the
number of
φ cycles.
I2C status register
write signal
Reset time for
BB flag
Hold time
Setup
time
SCL
SDA
BB flag
相關(guān)PDF資料
PDF描述
M37281MFH-XXXSP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP52
M37281MAH-XXXSP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP52
M37281MKH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
M37281MAH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
M37281MFH-XXXSP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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M37281MAH-XXXSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
M37281MFH-XXXSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
M37281MKH-XXXSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
M372899234 制造商:ITW Switches 功能描述:IN-RUSH
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