參數(shù)資料
型號: M37225ECSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù): 2/128頁
文件大?。?/td> 1481K
代理商: M37225ECSP
M37225M6/M8/MA/MC-XXXSP, M37225ECSP
Rev.1.00
Nov 01, 2000
page 8 of 124
REJ03B0136-0100Z
Notes 1: Port Pi (i = 0 to 3) has the port Pi direction register which can be used to program each bit as an input (“0”) or an output (“1”). The pins programmed as “1”
in the direction register are output pins. When pins are programmed as “0,” they are input pins. When pins are programmed as output pins, the output data
are written into the port latch and then output. When data is read from the output pins, the output pin level is not read but the data of the port latch is read.
This allows a previously-output value to be read correctly even if the output LOW voltage has risen, for example, because a light emitting diode was directly
driven. The input pins are in the floating state, so the values of the pins can be read. When data is written into the input pin, it is written only into the port
latch, while the pin remains in the floating state.
2: To switch output structures, set by the following bits.
P30 : bit 6 of port P3 direction register
P31 : bit 7 of port P3 direction register
P35 : bit 5 of port P35 output mode control register
When “0,” CMOS output; when “1,” N-channel open-drain output.
Pin
Name
Input/
Functions
Output
HSYNC/P50, Input port P5
Input
Ports P50 and P51 are a 2-bit input port.
VSYNC/P51
HSYNC input
Input
This is a horizontal synchronizing signal input for OSD.
VSYNC input
Input
This is a vertical synchronizing signal input for OSD.
R/P52,
Output port P5
Output
Ports P52–P55 are a 4-bit output port. The output structure is CMOS output.
G/P53,
B/P54,
OSD output
Output
Pins P52–P55 are also used as OSD output pins R, G, B, OUT1 respectively. The output
OUT1/P55
structure is CMOS output. At reset, output is LOW.
Table 7.2 Pin Description (continued)
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