參數(shù)資料
型號： M37224M3-XXXSP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù)： 3/86頁
文件大?。?/td> 988K
代理商： M37224M3-XXXSP
M37224M3-XXXSP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
8
CPU Mode Register
The CPU mode register contains the stack page selection bit. The
CPU mode register is allocated at address 00FB16.
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The M37224M3-XXXSP uses the standard 740 Family instruction
set. Refer to the table of 740 Family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Machine-resident 740 family instructions are as follows:
The FST, SLW instruction cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
Fig. 3. CPU Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
B
After reset RW
CPU Mode Register
0, 1
2
3
to
7
0
1
Name
Functions
Processor mode bits
(CM0, CM1)
0 0: Single-chip mode
0 1:
1 0:
Not available
1 1:
Fix these bits to “1.”
1
Stack page selection
bit (CM2) (See note)
1
b1 b0
0: 0 page
1: 1 page
10
0
CPU mode register (CPUM (CM)) [Address FB16]
RW
Note: This bit is set to “1” after the reset release.
1
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