參數(shù)資料
型號: M37221EF-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-42
文件頁數(shù): 32/63頁
文件大小: 1371K
代理商: M37221EF-XXXSP
M37221EF-XXXSP,M37221EFSP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
38
The horizontal position is common to all blocks, and can be set in 64
steps (where 1 step is 4TC, TC being the display oscillation period)
as values “0016” to “3F16” in bits 0 to 5 of the horizontal position
register (address 00E016). The structure of the horizontal position
register is shown in Figure 41.
The display position in the vertical direction is determined by count-
ing the horizontal sync signal (HSYNC). At this time, it starts to count
the rising edge (falling edge) of HSYNC signal from after about 1 ma-
chine cycle of rising edge (falling edge) of VSYNC signal. So interval
from rising edge (falling edge) of VSYNC signal to rising edge (falling
edge) of HSYNC signal needs enough time (2 machine cycles or more)
for avoiding jitter. The polarity of HSYNC and VSYNC signals can se-
lect with the CRT port control register (address 00EC16). For details.
refer to (8) CRT Output Pin Control.
Note: When bits 0 and 1 of the CRT port control register (address
00EC16) are set to “1” (negative polarity), the vertical position
is determined by counting falling edge of HSYNC signal after
rising edge of VSYNC control signal in the microcomputer (re-
fer to Figure 39).
Fig. 39. Supplement explanation for display position
Fig. 40. Structure of vertical position register
Fig. 41. Structure of horizontal position register
When bits 0 and 1 of the CRT port control register (address
00EC16) are set to “1” (negative polarity)
VSYNC signal input
VSYNC control
signal in
microcomputer
0.125 to 0.25 [
s]
( at f(XIN) = 8MHz)
Period of counting
HSYNC signal
(Note)
HSYNC
signal input
Not count
12345
Note: Do not generate falling edge of HSYNC signal near rising
edge of VSYNC control signal in microcomputer to avoid
jitter.
Vertical position registers 1, 2
(CV1 : address 00E116)
(CV2 : address 00E216)
70
Vertical display start positions
128 steps from “0016” to “7F16
Horizontal position register
(HR : address 00E016)
Horizontal display start positions
64 steps from “0016” to “3F16
(1 step is 4TC)
70
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