MITSUBISHI MICROCOMPUTERS
M37212M4-XXXSP, M37212M6-XXXSP/FP
M37212EF-XXXSP/FP, M37212EFSP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
and ON-SCREEN DISPLAY CONTROLLER
27
PWM OUTPUT FUNCTION
The M37212M6-XXXSP/FP is equipped with a 14-bit PWM (DA) and
eight 8-bit PWMs (PWM0–PWM7). DA has a 14-bit resolution with
the minimum resolution bit width of 0.25
s (for f(XIN) = 8 MHz) and
a repeat period of 4096
ms. PWM0–PWM7 have the same circuit
structure and an 8-bit resolution with minimum resolution bit width of
4
ms (for f(XIN) = 8 MHz) and repeat period of 1024 ms.
Figure 23 shows the PWM block diagram. The PWM timing generat-
ing circuit applies individual control signals to PWM0–PWM7 using
f(XIN) divided by 2 as a reference signal.
(1) Data Setting
When outputting DA, first set the high-order 8 bits to the DA-H regis-
ter (address 00CE16), then the low-order 6 bits to the DA-L register
(address 00CF16). When outputting PWM0–PWM7, set 8-bit output
data in the PWMi register (i means 0 to 7; addresses 00D016 to
00D416, 00F616 to 00F816).
(2) Transmitting Data from Register to PWM circuit
Data transfer from the 8-bit PWM register to 8-bit PWM circuit is
executed at writing data to the register.
The signal output from the 8-bit PWM output pin corresponds to the
contents of this register.
Also, data transfer from the DA register (addresses 00CE16 and
00CF16) to the 14-bit PWM circuit is executed at writing data to the
DA-L register (address 00CF16). Reading from the DA-H register
(address 00CE16) means reading this transferred data. Accordingly,
it is possible to confirm the data being output from the D-A output pin
by reading the DA register.
(3) Operating of 8-bit PWM
The following is the explanation about PWM operation.
At first, set the bit 0 of PWM output control register 1 (address 00D516)
to “0” (at reset, bit 0 is already set to “0” automatically), so that the
PWM count source is supplied.
PWM0–PWM3 are also used as pins P60–P63, PWM4–PWM7 are
also used as ports P00–P03, respectively. For PWM0–PWM3, set
the corresponding bits of the port P6 direction register to “1” (output
mode). For PWM4–PWM7, set those of the port P0 direction regis-
ter to “1.” And select each output polarity by bit 3 of the PWM output
control register 2(address 00D616). Then, for PWM0–PWM5, set bits
2 to 7 of the PWM output control register 1 to “1” (PWM output). For
PWM6 and PWM7, set bits 0 and 1 of the PWM output control regis-
ter 2 to “1.”
The PWM waveform is output from the PWM output pins by setting
these registers.
Figure 24 shows the 8-bit PWM timing. One cycle (T) is composed
of 256 (28) segments. The 8 kinds of pulses relative to the weight of
each bit (bits 0 to 7) are output inside the circuit during 1 cycle. Refer
to Figure 24 (a). The 8-bit PWM outputs waveform which is the logi-
cal sum (OR) of pulses corresponding to the contents of bits 0 to 7 of
the 8-bit PWM register. Several examples are shown in Figure 24
(b). 256 kinds of output (“H” level area: 0/256 to 255/256) are se-
lected by changing the contents of the PWM register. A length of
entirely “H” output cannot be output, i.e. 256/256.
(4) Operating of 14-bit PWM
As with 8-bit PWM, set the bit 0 of the PWM output control register 1
(address 00D516) to “0” (at reset, bit 0 is already set to “0” automati-
cally), so that the PWM count source is supplied. Next, select the
output polarity by bit 2 of the PWM output control register 2 (address
00D616). Then, the 14-bit PWM outputs from the D-A output pin by
setting bit 1 of the PWM output control register 1 to “0” (at reset, this
bit already set to “0” automatically) to select the DA output.
The output example of the 14-bit PWM is shown in Figure 25.
The 14-bit PWM divides the data of the DA latch into the low-order 6
bits and the high-order 8 bits.
The fundamental waveform is determined with the high-order 8-bit
data “DH.” A “H” level area with a length
τ ! DH(“H” level area of
fundamental waveform) is output every short area of “t” = 256
τ =
64
ms (τ is the minimum resolution bit width of 0.25 s). The “H” level
area increase interval (tm) is determined with the low-order 6-bit data
“DL.” The “H” level are of smaller intervals “tm” shown in Table 6 is
longer by
τ than that of other smaller intervals in PWM repeat period
“T” = 64t. Thus, a rectangular waveform with the different “H” width is
output from the D-A pin. Accordingly, the PWM output changes by
τ
unit pulse width by changing the contents of the DA-H and DA-L
registers. A length of entirely “H” output cannot be output, i. e. 256/
256.
(5) Output after Reset
At reset, the output of ports P60–P63 and P00–P03 are in the high-
impedance state, and the contents of the PWM register and the
PWM circuit are undefined. Note that after reset, the PWM output is
undefined until setting the PWM register.