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參數(shù)資料
| 型號： | M35080FP |
| 元件分類： | 顯示控制器 |
| 英文描述： | 128 X 96 DOTS CRT CHAR OR GRPH DSPL CTLR, PDSO24 |
| 封裝： | 0.300 INCH, 0.80 MM PITCH, SSOP-24 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大小： | 162K |
| 代理商： | M35080FP |
MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
11
Address 000116
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Register
DA
Function
Contents
Remarks
Status
Set "0" to this bit.
Can not be used.
Display OFF
Display ON
Set "0" to this bit.
Can not be used.
when set to R < 0, R = 0.
Same as G output and B output.
Set "0" to this bit.
Can not be used.
Set "0" to this bit.
Can not be used.
Set "0" to this bit.
Can not be used.
Set "0" to this bit.
Can not be used.
Set "0" to this bit.
Can not be used.
Set the pixel composition.
The BLNK signal of the range set up by
this register is outputted at the time of
BLANK1, 0 = 0, and 0 (normal) setup.
The measure against a character bend
(test bit)
Control of blank signal.
(a blank setup in a bit unit is possible).
Note 2
Control of R, G and B output luminosity
WIDTH0
WIDTH1
WIDTH2
–
DSPON
–
BLANK0
BLANK1
YM0
YM1
YM2
–
WIDTH2 WIDTH1 WIDTH0
Pixel (Horizontal Vertical)
0
128 96 dots
0
1
192 64 dots
0
1
0
256 48 dots
0
1
384 32 dots
10
0
32 384 dots
10
1
48 256 dots
11
0
64 192 dots
11
1
96 128 dots
BLANK1 BLANK0
Blank signal
00
Normal(Control by register WIDTH 0 to 2)
0
1
Control by Bit map RAM(R0)
1
0
Control by Bit map RAM(G0)
1
Control by Bit map RAM(B0)
R =
Σ 2nRn – Σ 2nYMn
2
n =
0
2
n =
0
Notes 1 : This register is consisted of 2 pages (address community) of the register for page A, and the register for page B.
Writing control to each page is performed by registers PAGEONA and PAGEONB (address 000016).
2 : The bit map RAM used for blank signal control is not applicable to color setup.
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