參數(shù)資料
型號(hào): M35072-XXXFP
元件分類: 顯示控制器
英文描述: 24 X 12 CHARACTERS CRT CHAR DSPL CTLR, PDSO20
封裝: 0.300 INCH, PLASTIC, SSOP-20
文件頁數(shù): 39/40頁
文件大?。?/td> 224K
代理商: M35072-XXXFP
MITSUBISHI MICROCOMPUTERS
M35072-XXXFP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
8
Set external clock frequency division value of horizontal oscillation
frequency.
N1 =
N1 : division value
DA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Set display frequency range.
Display clock setting
See REGISTER SUPPLYMENTARY
DESCRIPTION (1)
EXCK1 : address12316
Alleviates continuous vertical jitters.
EXCK1
0
1
EXCK0
0
1
0
1
DIV0
DIV1
DIV2
DIV3
DIV4
DIV5
DIV6
DIV7
DIV8
DIV9
DIV10
DIVS0
DIVS1
VJT
10
Σ
n = 0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
0
1
REGISTERS DESCRIPTION
(1) Address 12016
Register
Status
Contents
Function
Remarks
(DIVn
× 2n)
____
Notes 1. The mark
around the status value means the reset status by the "L" level is input to AC pin.
2. The page in which data is written is controlled by the DAF bit. When set to "0", data is written into page 0, whereas when set to "1",
data is written into page 1.
3. Registers marked with (Note 3) are found only in page 0, therefore the register value does not change when the DAF bit is set to "1".
Display clock input
External synchronous (external clock)
Do not set
External synchronous (internal clock)
It is used to "0", normally.
For setting, see REGISTER SUPPLYMENTARY DESCRIPTION
(2).
Set display frequency by division value
setting.
For details, see REGISTER
SUPPLYMENTARY DESCRIPTION
(1).
Also, set the display frequency range by
registers DIVS0, DIVS1(address
12016), RSEL0(address 12116) and
RSEL1(address 12216) in accordance
with the display frequency.
Any of this settings above is required
only when EXCK1 = 1, EXCK0 = 1.
EXCK0
(Note 3)
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